參數(shù)資料
型號(hào): LT1999CMS8-20#PBF
廠商: Linear Technology
文件頁數(shù): 6/24頁
文件大?。?/td> 0K
描述: IC OP AMP CURRENT SENSE 8-MSOP
標(biāo)準(zhǔn)包裝: 50
放大器類型: 電流檢測(cè)
電路數(shù): 1
輸出類型: 帶緩沖
轉(zhuǎn)換速率: 3 V/µs
-3db帶寬: 2MHz
電流 - 輸入偏壓: 137.5µA
電壓 - 輸入偏移: 500µV
電流 - 電源: 5.8mA
電流 - 輸出 / 通道: 40mA
電壓 - 電源,單路/雙路(±): 4.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-MSOP
包裝: 管件
LT1999-10/LT1999-20/
LT1999-50
14
1999fb
The LT1999 current sense amplifier provides accurate
bidirectionalmonitoringofcurrentthroughauser-selected
senseresistor.Thevoltagegeneratedbythecurrentflowing
in the sense resistor is amplified by a fixed gain of 10V/V,
20V/V or 50V/V (LT1999-10, LT1999-20, or LT1999-50
respectively) and is level shifted to the OUT pin. The volt-
age difference and polarity of the OUT pin with respect
to REF (Pin 6) indicates magnitude and direction of the
current in the sense resistor.
THEORY OF OPERATION
Refer to the Block Diagram (Figure 1).
Case 1: V+ < VCM < 80V
For input common mode voltages exceeding the power
supply, one can assume D1 of Figure 1 is completely off.
The sensed voltage (VSENSE) is applied across Pin 2 (+IN)
and Pin 3 (–IN) to matched resistors R+IN and R–IN (nomi-
nally 4k each). The opposite ends of R+IN and R–IN are
forced to equal potentials by transconductor GIN, which
convert the differentially sensed voltage into a sensed
current. The sensed current in R+IN and R–IN is combined,
level-shifted, and converted back into a voltage by trans-
resistance amplifier AO and resistor RG. Amplifier AO pro-
vides high open loop gain to accurately convert the sensed
current back into a voltage and to drive external loads. The
theoretical output voltage is determined by the sensed
voltage (VSENSE), and the ratio of two on-chip resistors:
VOUT VREF = VSENSE
RG
RIN
where
RIN =
R+IN + RIN
2
nominally 4k
FortheLT1999-10,RGisnominally40k.FortheLT1999-20,
RG is nominally 80k, and for the LT1999-50, RG is nomi-
nally 200k.
applicaTions inForMaTion
The voltage difference between the OUT pin and the REF
pin represent both polarity and magnitude of the sensed
voltage. The noninverting input of amplifier AO is biased
by a resistive 160k to 160k divider tied between V+ and
GND to set the default REF pin bias to mid-supply.
Case 2: –5V < VCM < V+
Forcommonmodeinputswhichtransitionoraresetbelow
the supply voltage, diode D1 will turn on and will provide a
source of current through R+S and R–S to bias the inputs
of transconductance amplifier GIN at least 2.25V above
GND. The transition is smooth and continuous; there are
negligible changes to either gain or amplifier voltage off-
set. The only difference in amplifier operation is the bias
currents provided by D1 through R+S and R–S are steered
through the input pins, otherwise amplifier operation is
identical. The inputs to transconductance amplifier GINare
still forced to equal potentials forcing any differential volt-
ages appearing at the +IN and –IN pins into a differential
current.Thisdifferentialcurrentiscombined,level-shifted,
and converted back into a voltage by trans-resistance
amplifier AO and Resistor RG. Resistors R+S and R–S are
trimmed to match R+IN and R–IN respectively, to prevent
common mode to differential conversion from occurring
(to the extent of the matched trim) when the input com-
mon mode transitions below V+.
As described in case 1, the output is determined by the
sense voltage and the ratio of two on-chip resistors:
VOUT VREF = VSENSE
RG
RIN
where
RIN =
R+IN + RIN
2
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