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參數(shù)資料
| 型號(hào)： | LT3461A |
| 廠商： | Linear Technology Corporation |
| 英文描述： | 1.3MHz/3MHz Step-Up DC/DC Converters with Integrated Schottky in ThinSOT |
| 中文描述： | 1.3MHz/3MHz升壓型DC集成肖特基/ DC轉(zhuǎn)換器采用ThinSOT |
| 文件頁(yè)數(shù)： | 4/8頁(yè) |
| 文件大?。?/td> | 149K |
| 代理商： | LT3461A |
LT3461/LT3461A
4
3461af
OPERATIOU
Figure 2. Suggested Layout
R2
R1
GND
C3
L1
C1
V
OUT
V
IN
SHUTDOWN
+
C2
+
3461a F03
The LT3461/LT3461A uses a constant frequency, current
mode control scheme to provide excellent line and load
regulation. Operation can be best understood by referring
to the block diagram in Figure 1. At the start of each
oscillator cycle, the SR latch is set, which turns on the
power switch Q1. A voltage proportional to the switch
current is added to a stabilizing ramp and the resulting
sum is fed into the positive terminal of the PWM compara-
tor A2. When this voltage exceeds the level at the negative
input of A2, the SR latch is reset turning off the power
switch. The level at the negative input of A2 is set by the
error amplifier A1, and is simply an amplified version of
the difference between the feedback voltage and the
reference voltage of 1.255V. In this manner, the error
amplifier sets the correct peak current level to keep the
output in regulation. If the error amplifier’s output in-
creases, more current is delivered to the output; if it
decreases, less current is delivered.
Layout Hints
The high speed operation of the LT3461/LT3461A de-
mands careful attention to board layout. You will not get
advertised performance with careless layout. Figure 2
shows the recommended component placement.
BLOCK DIAGRA
–
+
–
+
–
+
6
1
3
2
∑
V
OUT
V
OUT
R1 (EXTERNAL)
R2 (EXTERNAL)
R
S
(EXTERNAL)
C
S
(EXTERNAL)
FB
SHUTDOWN
SHDN
RAMP
GENERATOR
1.255V
REFERENCE
3MHz*
OSCILLATOR
R
S
Q
4
A1
A2
COMPARATOR
DRIVER
R
C
C
C
SW
Q1
0.1
GND
V
IN
FB
3461a F02
R
S
, C
S
OPTIONAL SOFT-START COMPONENTS
5
*LT3461 IS 1.3MHz
Figure 1. Block Diagram
PIU
SW (Pin 1):
Switch Pin. Connect inductor here. Minimize
trace at this pin to reduce EMI.
GND (Pin 2):
Ground Pin. Tie directly to local ground
plane.
FB (Pin 3):
Feedback Pin. Reference voltage is 1.255V.
Connect resistor divider tap here. Minimize trace area at
FB. Set V
OUT
according to V
OUT
= 1.255V (1 + R1/R2).
SHDN (Pin 4):
Shutdown Pin. Tie to 1.5V or higher to
enable device; 0.4V or less to disable device. Also func-
tions as soft-start. Use RC filter (47k, 47nF typ) as shown
in Figure 1.
V
OUT
(Pin 5):
Output Pin. Connect to resistor divider. Put
capacitor close to pin and close to GND plane.
V
IN
(Pin 6):
Input Supply Pin. Must be locally bypassed.
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