參數(shù)資料
型號(hào)： LT3837IFE#PBF
廠商： LINEAR TECHNOLOGY CORP
元件分類： 穩(wěn)壓器
英文描述： SWITCHING CONTROLLER, 110 kHz SWITCHING FREQ-MAX, PDSO16
封裝： 4.40 MM, LEAD FREE, PLASTIC, TSSOP-16
文件頁(yè)數(shù)： 15/28頁(yè)
文件大?。?/td> 247K
代理商： LT3837IFE#PBF
LT3837
22
3837fc
APPLICATIONS INFORMATION
With CMILLERdetermined,calculatetheprimary-sidepower
MOSFET power dissipation:
PI
R
V
P
DPRI
RMS PRI
DS ON
IN MAX
IN
=+
()+
()
(
)
()
(
2
1
δ
M
MAX
IN
DR
MILLER
GATE MAX
TH
OSC
DC
R
C
VV
f
)
()
–
where:
RDR is the gate driver resistance approximately 10Ω
VTH is the MOSFET gate threshold voltage
fOSC is the operating frequency.
(1 +
δ) is generally given for a MOSFET in the form of a
normalized RDS(ON) vs temperature curve. If you don’t
have a curve, use
δ = 0.005/°C as an estimate.
The secondary-side power MOSFETs typically operate
at substantially lower VDS, so you can neglect transition
losses. The dissipation is calculated using:
PD(SEC) = IRMS(SEC)2 RDS(ON)(1 + δ)
With power dissipation known, the MOSFETs’ junction
temperatures are obtained from the equation:
TJ = TA + PD θJA
where TAistheambienttemperatureandθJAistheMOSFET
junction to ambient thermal resistance.
Once you have TJ, iterate your calculations recomputing
δ, power dissipations until convergence.
Gate Drive Node Consideration
The PG and SG gate drivers are strong drives to minimize
gate drive rise and fall times. This improves efciency
but the high frequency components of these signals can
cause problems. Keep the traces short and wide to reduce
parasitic inductance.
The parasitic inductance creates an LC tank with the
MOSFET gate capacitance. In less than ideal layouts, a
series resistance of 5Ω or more may help to dampen the
ringing at the expense of slightly slower rise and fall times
and efciency.
The LT3837 gate drives will clamp the max gate voltage to
roughly 7.4V, so you can safely use MOSFETs with max
VGS of 10V or larger.
Synchronous Gate Drive
There are several different ways to drive the synchronous
gate MOSFET. Full converter isolation requires the synchro-
nous gate drive to be isolated. This is usually accomplished
by way of a pulse transformer. Usually the pulse driver is
used to drive a buffer on the secondary as shown in the
application on the front page of this data sheet.
However, other schemes are possible. There are gate drivers
and secondary side synchronous controllers available that
provide the buffer function as well as additional features.
Capacitor Selection
In a yback converter, the input and output current ows in
pulses,placingseveredemandsontheinputandoutputlter
capacitors.Theinputandoutputltercapacitorsareselected
based on RMS current ratings and ripple voltage.
Select an input capacitor with a ripple current rating
greater than:
I
P
V
DC
RMS
IN
IN MIN
MAX
=
()
–
1
Continuing the example:
I
W
V
A
RMS ==
37 5
9
152 4
52 4
397
.–
. %
.%
.
Input capacitor series resistance (ESR) and inductance
(ESL) need to be small as they affect electromagnetic
interference suppression. In some instances, high ESR can
also produce stability problems because yback converters
exhibit a negative input resistance characteristic. Refer to
Application Note 19 for more information.
The output capacitor is sized to handle the ripple current
and to ensure acceptable output voltage ripple. The output
capacitor should have an RMS current rating greater than:
II
DC
RMS
OUT
MAX
=
1–
Continuing the example::
IA
A
RMS ==
10
52 4
152 4
10 5
.%
–. %
.
This is calculated for each output in a multiple winding
application.
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