參數(shù)資料
型號: LT3845AIFE#TRPBF
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PDSO16
封裝: 4.40 MM, LEAD FREE, PLASTIC, TSSOP-16
文件頁數(shù): 11/26頁
文件大?。?/td> 284K
代理商: LT3845AIFE#TRPBF
LT3845A
19
3845afa
Oscillator SYNC
The oscillator can be synchronized to an external clock.
Set the RSET resistor at least 10% below the desired sync
frequency.
It is recommended that the SYNC pin be driven with a
square wave that has amplitude greater than 2V, pulse
width greater than 1s and rise time less than 500ns. The
rising edge of the sync wave form triggers the discharge
of the internal oscillator capacitor. The SYNC pin is not
available in the N-Package.
Minimum On-Time Considerations (Buck Mode)
Minimumon-timetON(MIN)isthesmallestamountoftimethat
the LT3845A is capable of turning the top MOSFET on and
off again. It is determined by internal timing delays and the
amount of gate charge required turning on the top MOSFET.
Low duty cycle applications may approach this minimum
on-time limit and care should be taken to ensure that:
tON =
VOUT
VIN fSW
> tON(MIN)
where tON(MIN) is 400ns worst case.
If the duty cycle falls below what can be accommodated
by the minimum on-time, the LT3845A will begin to skip
cycles. The output will be regulated, but the ripple current
andripplevoltagewillincrease.Iflowerfrequencyoperation
is acceptable, the on-time can be increased above tON(MIN)
for the same step-down ratio.
Layout Considerations
The LT3845A is typically used in DC/DC converter designs
that involve substantial switching transients. The switch
drivers on the IC are designed to drive large capacitances
and, as such, generate significant transient currents
themselves.Carefulconsiderationmustbemaderegarding
supply bypass capacitor locations to avoid corrupting the
ground reference used by IC.
Typically, high current paths and transients from the
input supply and any local drive supplies must be kept
isolated from SGND, to which sensitive circuits such as
the error amp reference and the current sense circuits
are referred.
Effectivegroundingcanbeachievedbyconsideringswitch
current in the ground plane, and the return current paths of
each respective bypass capacitor. The VIN bypass return,
VCC bypass return, and the source of the synchronous
FET carry PGND currents. SGND originates at the negative
terminal of the VOUT bypass capacitor, and is the small
signal reference for the LT3845A.
Don’t be tempted to run small traces to separate ground
paths. A good ground plane is important as always,
but PGND referred bypass elements must be oriented
such that transient currents in these return paths do not
corrupt the SGND reference.
During the dead-time between switch conduction, the
body diode of the synchronous FET conducts inductor
current. Commutating this diode requires a significant
charge contribution from the main switch. At the instant
the body diode commutates, a current discontinuity
is created and parasitic inductance causes the switch
node to fly up in response to this discontinuity. High
currents and excessive parasitic inductance can generate
extremely fast dV/dt rise times. This phenomenon can
cause avalanche breakdown in the synchronous FET
body diode, significant inductive overshoot on the switch
node, and shoot-through currents via parasitic turn-on of
the synchronous FET. Layout practices and component
orientations that minimize parasitic inductance on this
node is critical for reducing these effects.
Ringingwaveformsinaconvertercircuitcanleadtodevice
failure, excessive EMI, or instability. In many cases, you
can damp a ringing waveform with a series RC network
across the offending device. In LT3845A applications,
any ringing will typically occur on the switch node, which
can usually be reduced by placing a snubber across the
synchronous FET. Use of a snubber network, however,
shouldbeconsideredalastresort.Effectivelayoutpractices
typically reduce ringing and overshoot, and will eliminate
the need for such solutions.
APPLICATIONS INFORMATION
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