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參數(shù)資料
| 型號： | LT5514 |
| 廠商： | Linear Technology Corporation |
| 元件分類： | ADC |
| 英文描述： | Ultralow Distortion IF Amplifier/ADC Driver with Digitally Controlled Gain |
| 中文描述： | 超低失真IF放大器/ ADC的數(shù)字控制增益驅(qū)動(dòng) |
| 文件頁數(shù)： | 13/20頁 |
| 文件大?。?/td> | 275K |
| 代理商： | LT5514 |
13
LT5514
5514f
Input Interface
For the lowest noise and highest linearity, the LT5514
should be driven with a differential input signal. Single-
ended drive will severely degrade linearity and noise
performance.
Example input matching networks are shown in Figures 3
and 4.
Input matching network design criteria are:
DC block the LT5514 internal bias voltage (see Input
Bias Voltage section for DC coupling information)
Match the source impedance to the LT5514, R
IN
108
Provide well balanced differential input drive (capacitor
C2 in Figure 4)
Minimize insertion loss to avoid degrading the noise
figure (NF)
Note: In Figure 5, (choke) inductors may be placed in
parallel with or used to replace resistors R1 and R2, thus
eliminating the DC voltage drop across these resistors.
APPLICATIU
W
U
U
+
–
IN
R
IN
+
V
SRC
LT5514
LT5514 F03
C1
R1
50
R2
50
C2
IN
–
Figure 3. Input Capacitively-Coupled to a Differential Source
+
–
R
IN
100
IN
+
C2
0.33
μ
F
LT5514
LT5514 F04
R
SRC
50
T1
1:2
V
SRC
IN
–
Figure 4. Input Transformer-Coupled to a Single-Ended Source
Output Interface
The output interface network provides an impedance
transformation between the actual load impedance, R
LOAD
,
and the LT5514 output loading, R
OUT
, chosen to maximize
power or linearity, or to minimize output noise, or for some
other criteria as explained in the following sections.
Two examples of output matching networks are shown in
Figures 5 and 6 (as implemented in the LT5514 demo
boards).
Figure 5. Output Impedance-Matched
and Capacitively Coupled to a Differential Load
+
–
IN
R
IN
+
LT5514
C1
C3
C2
R1
51
R2
51
V
OSUP
R
LOAD
50
R
LOAD
50
R
OUT
LT5514 F05
IN
–
Figure 6. Output Impedance-Matched and
Transformer-Coupled to a Single-Ended Load
+
–
IN
R
IN
+
LT5514
C1
R
255
(OPTIONAL)
V
OSUP
R
LOAD
50
T2
4:1
R
OUT
LT5514 F06
IN
–
Output network design criteria are:
Provide DC isolation between the LT5514 DC output
voltage and R
LOAD
.
Provide a path for the output DC current from the output
voltage source V
OSUP
.
Provide an impedance transformation, if required, be-
tween the load impedance, R
LOAD
, and the optimum
R
OUT
loading.
Set the bandwidth of the output network.
Optional: Provide board output impedance matching
using resistor R
MATCH
(when driving a transmission
line).
Use high linearity passive parts to avoid introducing
noninearity.
Note that there is a noise penalty of up to 6dB when using
power delivered by only one output in Figure 5.
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