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參數(shù)資料
| 型號： | LT5514EFE |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 模擬信號調理 |
| 英文描述： | Ultralow Distortion IF Amplifier/ADC Driver with Digitally Controlled Gain |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO20 |
| 封裝： | 4.40 MM, PLASTIC, TSSOP-20 |
| 文件頁數(shù)： | 14/20頁 |
| 文件大?。?/td> | 275K |
| 代理商： | LT5514EFE |
14
LT5514
5514f
APPLICATIU
Clipping Free Operation
The LT5514 is a class A amplifier. To avoid signal distor-
tion, the user must ensure that the LT5514 outputs do not
enter into current or voltage limiting. The following discus-
sion applies to standard mode operation at maximum gain.
To avoid current clipping, the output signal current should
not exceed the DC quiescent current, I
OUT
= 40mA (typi-
cal). Correspondingly, the maximum input voltage,
V
IN(MAX)
, is I
OUT
/g
m
= 133mV (peak). In power terms,
P
IN(MAX)
= –10.8dBm (assuming R
IN
= 108
).
To avoid output voltage clipping (due to LT5514 output
stage saturation or breakdown), the single-ended output
voltage swing should stay within the specified limits; i.e.,
2V
≤
V
OUT
≤
8V. For a DC output bias of 5V, the maximum
single ended swing will be 3Vpeak and the maximum
differential swing will be 6Vpeak. The simultaneous onset
of both current and voltage limiting occurs when R
OUT
=
6Vpeak/40mA =150
(typ) for a maximum P
OUT
=
20.8dBm. This calculation applies for a sinusoidal signal.
For nonsinusoidal signals, use the appropriate crest fac-
tor to calculate the actual maximum power that avoids
output clipping.
For nonoptimal R
OUT
values, the maximum available out-
put power will be lower and can be calculated (considering
current limiting for R
OUT
< 150
, and voltage limiting for
R
OUT
> 150
). The result of this calculation is shown in
Figure 7.
The LT5514 input should not be overdriven (P
IN
>
–10dBm). The consequences of overdrive are reduced
W
U
U
bandwidth and, when the frequency is greater than 50MHz,
reduced output power.
Input Bias Voltage
The LT5514 IN
+
, IN
–
signal inputs are internally biased to
1.48V common mode when enabled, and to 1.26V in
shutdown mode. These inputs are typically coupled by
means of a capacitor or a transformer to a signal source,
and impedance matching is assumed. In shutdown mode,
the internal bias can handle up to 1
μ
A leakage on the input
coupling capacitors. This reduces the turn-on delay due to
the input coupling RC time constant when exiting shut-
down mode.
If DC coupling to the input is required, the external
common mode bias should track the LT5514’s internal
common mode level. The DC current from the LT5514
inputs should not exceed I
IN(SINK)
= –400
μ
A and I
IN(SOURCE)
= 800
μ
A in Standard mode and half of these values in Low
Power mode.
Stability Considerations
The LT5514’s open-loop architecture allows it to drive any
practical load. Note that LT5514 gain is proportional to the
load impedance, and may exceed the reverse isolation at
frequencies above 1GHz if the LT5514’s outputs are left
unloaded, with instability as the undesirable consequence.
In such cases, placing a resistive differential load (e.g., 2k)
or a small capacitor at the LT5514 outputs can be used to
limit the maximum gain.
The LT5514 has about 30GHz gain-bandwidth product.
Hence, attention must be paid to the printed circuit board
layout to avoid output pin to input pin signal coupling (the
evaluation board layout is a good example). Due to the
LT5514’s internal power supply regulator, external supply
decoupling capacitors typically are not required. Likewise,
decoupling capacitors on the LT5514 control inputs typi-
cally are not needed. Note, however, that the Exposed Pad
on the LT5514 package must be soldered to a good ground
plane on the PCB.
PGA Function, Linearity and NF
As described in the Circuit Operation section, the LT5514
consists of a variable (step) attenuator followed by a high
Figure 7. Maximum Output Power as a Function of R
OUT
R
OUT
(
)
20
P
O
25
100
1000 2000
5514 F07
20
15
5
0
10
STANDARD MODE
LOW POWER MODE
V
CC
= V
CCO
= 5V
CURRENT
LIMIT
VOLTAGE
LIMIT
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