R3 should be chosen to allow sufficient VOL and compara-<" />
參數(shù)資料
型號(hào)： LT6109IMS-2#TRPBF
廠商： Linear Technology
文件頁(yè)數(shù)： 11/28頁(yè)
文件大?。?/td> 0K
描述： IC AMP CURRENT SENSE 10MSOP
標(biāo)準(zhǔn)包裝： 2,500
類型： 放大器，比較器，參考
應(yīng)用： 電流感測(cè)，電源管理
安裝類型： 表面貼裝
封裝/外殼： 10-TFSOP，10-MSOP（0.118"，3.00mm 寬）
供應(yīng)商設(shè)備封裝： 10-MSOP
包裝： 帶卷 (TR)
LT6109-1/LT6109-2
19
610912fa
R3 should be chosen to allow sufficient VOL and compara-
tor output rise time due to capacitive loading.
R2 can be calculated:
R2
=
R1 V+ – 400mV
(
)– V
HYS(EXTRA) R3
(
)
VHYS(EXTRA)
For very large values of R2 PCB related leakage may
become an issue. A tee network can be implemented to
reduce the required resistor values.
The approximate total hysteresis will be:
VHYS =10mV +R1
V+ – 400mV
R2
+R3
For example, to achieve IUNDER = 100A with 50mV of
total hysteresis, R6 = 3.57k. Choosing R1 = 35.7k, R3 =
10k and V+ = 5V results in R2 = 4.12M.
The analog output voltage will also be affected when the
comparator trips due to the current injected into R6 by
the positive feedback. Because of this, it is desirable to
have (R1 + R2 + R3) >> R6. The maximum VOUTA error
caused by this can be calculated as:
VOUTA = V+
R6
R1
+R2+R3+R6
APPLICATIONS INFORMATION
In the previous example, this is an error of 4.3mV at the
output of the amplifier or 43V at the input of the amplifier
assuming a gain of 100.
When using the comparators with their inputs decoupled
fromtheoutputoftheamplifier,theymaybedrivendirectly
by a voltage source. It is useful to know the threshold
voltage equations with the additional hysteresis. The input
fallingedgethresholdwhichcausestheoutputtotransition
from high to low is:
VTH(F) = 400mV R1
1
R1
+
1
R2
+R3
–
V+ R1
R2
+R3
The input rising edge threshold which causes the output
to transition from low to high is:
VTH(R) = 410mV R1
1
R1
+
1
R2
Figure 14 shows how to add additional hysteresis to an
inverting comparator.
R7canbecalculatedfromtheamplifieroutputcurrentwhich
is required to cause the comparator output to trip, IOVER.
R7
=
400mV
IOVER
, Assuming R1+R2
(
) >> R7
Figure 14. Inverting Comparator with Added Hysteresis
–
+
V+
V–
INC1
V–
5
610912 F14
OUTA 8
9
6
V+
SENSEHI
LT6109-1
RIN
RSENSE
ILOAD
V+
SENSELO
OUTC1
4
1
10
400mV
REFERENCE
R3
R6
R7
R1 VTH
R2
VDD
–
+
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