參數(shù)資料
型號: LT6202IS8#PBF
廠商: Linear Technology
文件頁數(shù): 10/28頁
文件大?。?/td> 0K
描述: IC OPAMP R-R 100MHZ SGL 8SOIC
標準包裝: 100
放大器類型: 通用
電路數(shù): 1
輸出類型: 滿擺幅
轉換速率: 25 V/µs
增益帶寬積: 100MHz
電流 - 輸入偏壓: 3.8µA
電壓 - 輸入偏移: 2600µV
電流 - 電源: 2.8mA
電流 - 輸出 / 通道: 40mA
電壓 - 電源,單路/雙路(±): 2.5 V ~ 12.6 V,±1.25 V ~ 6.3 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 8-SO
包裝: 管件
配用: DC1813A-E-ND - BOARD SAR ADC LTC2369-18
DC1813A-A-ND - BOARD SAR ADC LTC2370-16
LT6202/LT6203/LT6204
18
620234fd
Amplifier Characteristics
Figure 1 shows a simplified schematic of the LT6202/
LT6203/LT6204, which has two input differential ampli-
fiers in parallel that are biased on simultaneously when
the common mode voltage is at least 1.5V from either
rail. This topology allows the input stage to swing from
the positive supply voltage to the negative supply voltage.
As the common mode voltage swings beyond VCC – 1.5V,
current source I1 saturates and current in Q1/Q4 is zero.
Feedback is maintained through the Q2/Q3 differential
amplifier, but with an input gm reduction of 1/2. A similar
effect occurs with I2 when the common mode voltage
swings within 1.5V of the negative rail. The effect of the
gm reduction is a shift in the VOS as I1 or I2 saturate.
APPLICATIONS INFORMATION
Input bias current normally flows out of the + and – inputs.
The magnitude of this current increases when the input
common mode voltage is within 1.5V of the negative rail,
and only Q1/Q4 are active. The polarity of this current
reverses when the input common mode voltage is within
1.5V of the positive rail and only Q2/Q3 are active.
The second stage is a folded cascode and current mir-
ror that converts the input stage differential signals to a
single ended output. Capacitor C1 reduces the unity cross
frequency and improves the frequency stability with-
out degrading the gain bandwidth of the amplifier. The
differential drive generator supplies current to the output
transistors that swing from rail-to-rail.
DIFFERENTIAL
DRIVE
GENERATOR
+
R1
R2
R3
R4
R5
Q2
Q3
Q5
Q6
Q9
Q8
Q7
Q10
Q11
Q1
Q4
I1
I2
D3
D2
D1
DESD2
DESD4
DESD3
DESD1
DESD5
DESD6
+
VBIAS
CM
C1
+V
–V
V+
V–
6203/04 F01
Figure 1. Simplified Schematic
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