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參數(shù)資料
| 型號： | LT6211IMS#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 15/18頁 |
| 文件大小： | 0K |
| 描述： | IC AMP CURR FDBK DUAL R-R 10MSOP |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 放大器類型： | 電流反饋 |
| 電路數(shù)： | 2 |
| 輸出類型： | 滿擺幅 |
| 轉(zhuǎn)換速率： | 700 V/µs |
| -3db帶寬： | 200MHz |
| 電流 - 輸入偏壓： | 13.5µA |
| 電壓 - 輸入偏移： | 1000µV |
| 電流 - 電源： | 6mA |
| 電流 - 輸出 / 通道： | 75mA |
| 電壓 - 電源，單路/雙路(±)： | 3 V ~ 12 V，±1.5 V ~ 6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-MSOP |
| 包裝： | 管件 |
LT6210/LT6211
6
62101fc
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: As long as output current and junction temperature are kept
below the absolute maximum ratings, no damage to the part will occur.
Depending on the supply voltage, a heat sink may be required.
Note 3: The LT6210C/LT6211C is guaranteed functional over the operating
temperature range of –40°C to 85°C.
Note 4: The LT6210C/LT6211C is guaranteed to meet specified
performance from 0°C to 70°C. The LT6210C/LT6211C is designed,
characterized and expected to meet specified performance from –40°C and
85°C but is not tested or QA sampled at these temperatures. The LT6210I/
LT6211I is guaranteed to meet specified performance from –40°C to 85°C.
Note 5: The LT6210 with no metal connected to the V– pin has a
θJA of
230°C/W, however, thermal resistances vary depending upon the amount
of PC board metal attached to Pin 2 of the device. With the LT6210
mounted on a 2500mm2 3/32" FR-4 board covered with 2oz copper on
both sides and with just 20mm2 of copper attached to Pin 2,
θJA drops to
160°C/W. Thermal performance can be improved even further by using a
4-layer board or by attaching more metal area to Pin 2.
Thermal resistance of the LT6211 in MSOP-10 is specified for a 2500mm2
3/32" FR-4 board covered with 2oz copper on both sides and with 100mm2
of copper attached to Pin 5. Its performance can also be increased with
additional copper much like the LT6210.
To achieve the specified
θJA of 43°C/W for the LT6211 DFN-10, the
exposed pad must be soldered to the PCB. In this package,
θJA will benefit
elecTrical characTerisTics (I
S = 300A per Amplifier) The l denotes the specifications which
apply over the specified operating temperature range, otherwise specifications are at TA = 25°C. For V+ = 5V, V– = –5V: RSET = 1M to
ground, AV = +2, RF = RG = 11k, RL = 1k; For V+ = 3V, V– = 0V: RSET = 270k to V–, AV = +2, RF = 9.31k, RG = 9.31k to 1.5V, RL = 1k to
1.5V unless otherwise specified.
SYMBOL PARAMETER
CONDITIONS
V+ = 5V, V– = –5V, IS = 300A V+ = 3V, V– = 0V, IS = 300A
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
CMRR
Common Mode Rejection Ratio VIN = V+ – 1.2V to V– + 1.2V
l
46
43
50
46
dB
–ICMRR Inverting Input Current
Common Mode Rejection
VIN = V+ – 1.2V to V– + 1.2V
l
0.15
±1.5
±2
0.2
A/V
PSRR
Power Supply Rejection Ratio
VS = ±1.5V to ±6V (Note 6)
l
60
85
60
85
dB
–IPSRR
Inverting Input Current Power
Supply Rejection
VS = ±1.5V to ±6V (Note 6)
l
0.4
±2.2
±4
0.4
±2.2
±4
A/V
IS
Supply Current per Amplifier
l
0.3
0.525
0.6
0.3
0.38
0.43
mA
IOUT
Maximum Output Current
RL = 0Ω (Notes 7, 11)
l
±30
±10
mA
ROL
Transimpedance, VOUT/IIN–
VOUT = V+ – 1.2V to V– + 1.2V
300
660
65
120
kΩ
SR
Slew Rate
(Note 8)
120
170
20
V/s
tpd
Propagation Delay
50% VIN to 50% VOUT,
100mVP-P, Larger of tpd+, tpd–
30
50
ns
BW
–3dB Bandwidth
<1dB Peaking, AV = 1
10
7.5
MHz
ts
Settling Time
To 0.1% of VFINAL, VSTEP = 2V
200
300
ns
tf, tr
Small-Signal Rise and Fall Time 10% to 90%, VOUT = 100mVP-P
40
50
ns
HD2
2nd Harmonic Distortion
f = 1MHz, VOUT = 2VP-P
–40
––45
dBc
HD3
3rd Harmonic Distortion
f = 1MHz, VOUT = 2VP-P
–45
dBc
from increased copper area attached to the exposed pad.
TJ is calculated from the ambient temperature TA and the power
dissipation PD according to the following formula:
TJ = TA + (PD θJA)
The maximum power dissipation can be calculated by:
PD(MAX) = (VS IS(MAX)) + (VS/2)2/RLOAD
Note 6: For PSRR and –IPSRR testing, the current into the ISET pin is
constant, maintaining a consistent LT6210/LT6211 quiescent bias point.
A graph of PSRR vs Frequency is included in the Typical Performance
Characteristics showing +PSRR and –PSRR with RSET connecting ISET to
ground.
Note 7: While the LT6210 and LT6211 circuitry is capable of significant
output current even beyond the levels specified, sustained short-
circuit current exceeding the Absolute Maximum Rating of ±80mA may
permanently damage the device.
Note 8: This parameter is guaranteed to meet specified performance
through design and characterization. It is not production tested.
Note 9: Differential gain and phase are measured using a Tektronix
TSG120YC/NTSC signal generator and a Tektronix 1780R Video
Measurement Set. The resolution of this equipment is 0.1% and 0.1°. Five
identical amplifier stages were cascaded giving an effective resolution of
0.02% and 0.02°.
Note 10: Input voltage range on ±5V dual supplies is guaranteed by
CMRR. On 3V single supply it is guaranteed by design and by correlation
to the ±5V input voltage range limits.
Note 11: This parameter is tested by forcing a 50mV differential voltage
between the inverting and noninverting inputs.
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