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| 型號(hào)： | LT6552IS8#PBF |
| 廠商： | Linear Technology |
| 文件頁(yè)數(shù)： | 5/16頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP VID DIFF SGL 3.3V 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 100 |
| 應(yīng)用： | 差分 |
| 電路數(shù)： | 1 |
| -3db帶寬： | 75MHz |
| 轉(zhuǎn)換速率： | 600 V/µs |
| 電流 - 電源： | 14mA |
| 電流 - 輸出 / 通道： | 70mA |
| 電壓 - 電源，單路/雙路(±)： | 3 V ~ 12.6 V，±1.5 V ~ 6.3 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁(yè)面： | 1322 (CN2011-ZH PDF) |
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LT6552
13
6552f
Layout and Passive Components
With a bandwidth of 75MHz and a slew rate of 600V/
s,the
LT6552 requires special attention to board layout and
supply bypassing. Use a ground plane, short lead lengths
and RF quality low ESR supply bypass capacitors. The
positive supply pin should be bypassed with a small
capacitor (typically 0.1
F) within 1 inch of the pin. When
driving loads greater than 10mA, an additional 4.7
F
electrolytic capacitor should be used. When using split
supplies, the same is true for the negative supply pin. The
parallel combination of the feedback resistor and gain
setting resistor on Pin 8 (FB) can combine with the input
capacitance to form a pole which can degrade stability. In
general, use feedback resistors of 1k or less.
Operating with Low Closed-Loop Gains
The LT6552 has been optimized for closed-loop gains of
2 or greater. For a closed-loop gain of 2 the response
peaks about 3dB. Peaking can be reduced by using low
value feedback resistors, and can be eliminated by placing
a capacitor across the feedback resistor (feedback zero).
Figure 6 shows the closed-loop gain of 2 frequency
response with various values of the feedback capacitor.
This peaking shows up as a time domain overshoot of
40%; with an 8pF feedback capacitor the overshoot is
eliminated. Figures 7A and 7B show the Small Signal
Response of the LT6552 with and without an 8pF feedback
capacitor.
Figure 6. Closed-Loop Gain vs Frequency
Figure 7A. Small Signal Transient
Response, VS = 3.3V, 0V
Figure 7B. Small Signal Transient Response,
VS = 3.3V, 0V with 8pF Feedback Capacitor
FREQUENCY (MHz)
0.1
CLOSED-LOOP
VOLTAGE
GAIN
(dB)
10
9
8
7
6
5
4
3
2
1
0
1
10
100
6552 F06
AV = 2
RF = RG = 500
RL = 150
TA = 25°C
VOUT = 1.5V DC
VS = 3.3V, 0V
CF = 0pF
CF = 3pF
CF = 5pF
CF = 8pF
CF = 10pF
APPLICATIO S I FOR ATIO
WU
UU
1.5V
AV = 2
RF = RG = 500
RL = 150
AV = 2
CF = 8pF
RF = RG = 500
RL = 150
50ns/DIV
50mV/DIV
50ns/DIV
6552 F07a
6552 F07b
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