LT6600-5
6
66005fb
PIN FUNCTIONS
IN– and IN+ (Pins 1, 8): Input Pins. Signals can be ap-
plied to either or both input pins through identical external
resistors, RIN. The DC gain from differential inputs to the
differential outputs is 806Ω/RIN.
VOCM (Pin 2): Is the DC Common Mode Reference Voltage
for the 2nd Filter Stage. Its value programs the common
mode voltage of the differential output of the lter. Pin 2 is a
high impedance input, which can be driven from an external
voltage reference, or Pin 2 can be tied to Pin 7 on the PC
board. Pin 2 should be bypassed with a 0.01μF ceramic
capacitor unless it is connected to a ground plane.
V+ and V – (Pins 3, 6):
Power Supply Pins. For a single
3.3V or 5V supply (Pin 6 grounded) a quality 0.1μF ceramic
bypass capacitor is required from the positive supply pin
(Pin 3) to the negative supply pin (Pin 6). The bypass
should be as close as possible to the IC. For dual supply
applications, bypass Pin 3 to ground and Pin 6 to ground
with a quality 0.1μF ceramic capacitor.
OUT+ and OUT– (Pins 4, 5):
Output Pins. Pins 4 and 5 are
the lter differential outputs. Each pin can drive a 100Ω
and/or 50pF load to AC ground.
VMID (Pin 7): The VMID pin is internally biased at mid-
supply, see block diagram. For single supply operation
the VMID pin should be bypassed with a quality 0.01μF
ceramic capacitor to Pin 6. For dual supply operation,
Pin 7 can be bypassed or connected to a high quality DC
ground. A ground plane should be used. A poor ground
will increase noise and distortion. Pin 7 sets the output
common mode voltage of the 1st stage of the lter. It has
a 5.5kΩ impedance, and it can be overridden with an
external low impedance voltage source.
BLOCK DIAGRAM
–
+ –
+
VOCM
–
+
VOCM
806Ω
400Ω
1
2
3
4
V+
V–
11k
8
7
6
5
OP AMP
PROPRIETARY
LOWPASS
FILTER STAGE
VIN
–
VIN
+
RIN
66005 BD
IN+
VOCM
V+
OUT+
OUT–
V–
VMID
IN–