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參數(shù)資料
| 型號： | LTC1053CSW#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 13/16頁 |
| 文件大小： | 0K |
| 描述： | IC OPAMP CHOPR-STBL QUAD 18SOIC |
| 標(biāo)準(zhǔn)包裝： | 40 |
| 放大器類型： | 斷路器（零漂移） |
| 電路數(shù)： | 4 |
| 轉(zhuǎn)換速率： | 4 V/µs |
| 增益帶寬積： | 2.5MHz |
| 電流 - 輸入偏壓： | 15pA |
| 電壓 - 輸入偏移： | 0.5µV |
| 電流 - 電源： | 1mA |
| 電壓 - 電源，單路/雙路(±)： | 4.75 V ~ 16 V，±2.38 V ~ 8 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 18-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 18-SO |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1321 (CN2011-ZH PDF) |
LTC1051/LTC1053
6
10513fa
ACHIEVING PICOAMPERE/MICROVOLT PERFORMANCE
Picoamperes
In order to realize the picoampere level of accuracy of the
LTC1051/LTC1053, proper care must be exercised. Leak-
age currents in circuitry external to the amplifier can
significantly degrade performance. High quality insulation
should be used (e.g., Teflon, Kel-F); cleaning of all insulat-
ing surfaces to remove fluxes and other residues will
probably be necessary —particularly for high temperature
performance. Surface coating may be necessary to provide
a moisture barrier in high humidity environments.
Board leakage can be minimized by encircling the input
connections with a guard ring operated at a potential close
to that of the inputs: in inverting configurations, the guard
ring should be tied to ground; in noninverting connections,
to the inverting input. Guarding both sides of the printed
circuit board is required. Bulk leakage reduction depends
on the guard ring width.
Microvolts
Thermocouple effects must be considered if the LTC1051/
LTC1053’s ultra low drift op amps are to be fully utilized.
Any connection of dissimilar metals forms a thermoelec-
tric junction producing an electric potential which varies
with temperature (Seebeck effect.) As temperature sen-
sors, thermocouples exploit this phenomenon to produce
useful information. In low drift amplifier circuits, this effect
is a primary source of error.
Connectors, switches, relay contacts, sockets, resistors,
solder, and even copper wire are all candidates for thermal
EMF generation. Junctions of copper wire from different
manufacturers can generate thermal EMFs of 200nV/°C—
4 times the maximum drift specification of the LTC1051/
LTC1053. The copper/kovar junction, formed when wire or
printed circuit traces contact a package lead, has a thermal
EMF of approximately 35V/°C—700 times the maximum
drift specification of the LTC1051/LTC1053.
Minimizing thermal EMF-induced errors is possible if
judicious attention is given to circuit board layout and
component selection. It is good practice to minimize the
number of junctions in the amplifier’s input signal path.
Avoid connectors, sockets, switches and relays where
possible. In instances where this is not possible, attempt
to balance the number and type of junctions so that
differential cancellation occurs. Doing this may involve
deliberately introducing junctions to offset unavoidable
junctions.
When connectors, switches, relays and/or sockets are
necessary, they should be selected for low thermal EMF
activity. The same techniques of thermally balancing and
coupling the matching junctions are effective in reducing
the thermal EMF errors of these components.
Resistors are another source of thermal EMF errors.
Table 1 shows the thermal EMF generated for different
resistors. The temperature gradient across the resistor is
important, not the ambient temperature. There are two
junctions formed at each end of the resistor and if these
junctions are at the same temperature, their thermal EMFs
will cancel each other. The thermal EMF numbers are
approximate and vary with resistor value. High values give
higher thermal EMF.
Table 1. Resistor Thermal EMF
RESISTOR TYPE
THERMAL EMF/°C GRADIENT
Tin Oxide
~mV/°C
Carbon Composition
~450V/°C
Metal Film
~20V/°C
Wire Wound
Evenohm
~2V/°C
Manganin
~2V/°C
Input Bias Current, Clock Feedthrough
At ambient temperatures below 60°C, the input bias cur-
rent of the LTC1051/LTC1053 op amps’ is dominated by
the small amount of charge injection occurring during the
sampling and holding of the op amps’ input offset voltage.
The average value of the resulting current pulses is 10pA
to 15pA with sign convention shown in Figure 1.
Figure 1. LTC1051 Bias Current
–
+
–
+
1/2
LTC1051
1/2
LTC1051
TA < 60°CTA > 85°C
IB
+
IB
–
IB
+
IB
–
1051/53 F01
(a)
(b)
APPLICATIO S I FOR ATIO
WU
UU
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