The LTC1096(L) requires no DIN
參數(shù)資料
型號(hào): LTC1096IN8#PBF
廠商: Linear Technology
文件頁(yè)數(shù): 9/32頁(yè)
文件大小: 0K
描述: IC A/D CONV 8BIT SRL IN/OUT 8DIP
標(biāo)準(zhǔn)包裝: 50
位數(shù): 8
采樣率(每秒): 33k
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 600µW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 通孔
封裝/外殼: 8-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 8-PDIP
包裝: 管件
輸入數(shù)目和類(lèi)型: 1 個(gè)差分,單極
LTC1096/LTC1096L
LTC1098/LTC1098L
17
10968fc
Input Data Word
The LTC1096(L) requires no DIN word. It is permanently
congured to have a single differential input. The conver-
sion result, in which output on the DOUT line is MSB-rst
sequence, followed by LSB sequence providing easy
interface to MSB- or LSB-rst serial ports.
The LTC1098(L) clocks data into the DIN input on the ris-
ing edge of the clock. The input data words are dened
as follows:
Start Bit
The rst “l(fā)ogical one” clocked into the DIN input after CS
goes low is the start bit. The start bit initiates the data
transfer. The LTC1098(L) will ignore all leading zeros which
precede this logical one. After the start bit is received,
the remaining bits of the input word will be clocked in.
Further inputs on the DIN pin are then ignored until the
next CS cycle.
APPLICATIONS INFORMATION
CLK
CS
tCYC
POWER
DOWN
tsuCS
tWAKEUP
DIN
SGL/
DIFF
MSBF
B0*
B1
B2
B3
B4
B5
B6
B7
NULL
BIT
Hi-Z
DOUT
tCONV
tSMPL
HI-Z
START
ODD/
SIGN
DON'T CARE
MSB-FIRST DATA (MSBF = 0)
MSB-FIRST DATA (MSBF = 1)
10968 F02
CLK
CS
tCYC
POWER
DOWN
tsuCS
tWAKEUP
DIN
SGL/
DIFF
MSBF
B0
B1
B2
B3
B4
B5
B6
B7
NULL
BIT
Hi-Z
DOUT
tCONV
tSMPL
HI-Z
START
ODD/
SIGN
DON'T CARE
B7*
B6
B5
B4
B3
B2
B1
*AFTER COMPLETING THE DATA TRANSFER, IF FURTHER CLOCKS ARE APPLIED WITH CS LOW, THE ADC WILL OUTPUT ZEROS INDEFINITELY.
(MSB)
Figure 2. LTC1098(L) Operating Sequence Example: Differential Inputs (CH+, CH)
SGL/
DIFF
ODD/
SIGN
MSBF
START
MUX
ADDRESS
MSB-FIRST/
LSB-FIRST
10968 AI02
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