參數(shù)資料
型號(hào): LTC1098CN8
廠商: LINEAR TECHNOLOGY CORP
元件分類: ADC
英文描述: Micropower Sampling 8-Bit Serial I/O A/D Converters
中文描述: 2-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDIP8
封裝: 0.300 INCH, PLASTIC, DIP-8
文件頁數(shù): 18/28頁
文件大小: 452K
代理商: LTC1098CN8
18
LTC1096/LTC1096L
LTC1098/LTC1098L
Figure 7. LTC1098(L) “+” and “–” Input Settling Windows
CLK
D
IN
D
OUT
"+" INPUT
"–" INPUT
SAMPLE
HOLD
"+" INPUT MUST
SETTLE DURING
THIS TIME
t
SMPL
t
CONV
CS
SGL/DIFF
START
MSBF
DON'T CARE
1ST BIT TEST "–" INPUT MUST
SETTLE DURING THIS TIME
B7
LTC1096/8 F07
U
S
A
(Figure 6) and connect the center point to the MPU input.
It should be noted that to get full shutdown, the CS input
of the LTC1096/LTC1098 must be driven to the V
CC
voltage. This would require adding a level shift circuit to
the CS signal in Figure 6.
9V
O
PPLICATI
U
U
+IN
–IN
GND
V
CC
CLK
D
OUT
V
REF
50k
50k
6V
4.7
μ
F
MPU
(e.g. 8051)
5V
P1.4
P1.3
P1.2
LTC1096/98 F06
DIFFERENTIAL INPUTS
COMMON MODE RANGE
0V TO 6V
9V
LTC1096
OPTIONAL
LEVEL SHIFT
CS
Figure 6. Interfacing a 9V Powered LTC1096 to a 5V System
BOARD LAYOUT CONSIDERATIONS
Grounding and Bypassing
The LTC1096(L)/LTC1098(L) should be used with an ana-
log ground plane and single point grounding tech
niques.
The GND pin should be tied directly to the ground plane.
The V
CC
pin should be bypassed to the ground plane with
a 1
μ
F tantalum with leads as short as possible. If power
supply is clean, the LTC1096(L)/LTC1098(L) can also
operate with smaller 0.1
μ
F surface mount or ceramic
bypass capacitors. All analog inputs should be referenced
directly to the single point ground. Digital inputs and
outputs should be shielded from and/or routed away from
the reference and analog circuitry.
SAMPLE-AND-HOLD
Both the LTC1096(L) and the LTC1098(L) provide a built-
in sample-and-hold (S&H) function to acquire signals.
The S&H of the LTC1096(L) acquires input signals from
“+” input relative to “–” input during the t
WAKEUP
time (see
Figure 1). However, the S&H of the LTC1098(L) can
sample input signals in the single-ended mode or in the
differential inputs during the t
SMPL
time (see Figure 7).
Single-Ended Inputs
The sample-and-hold of the LTC1098(L) allows conver-
sion of rapidly varying signals. The input voltage is sampled
during the t
SMPL
time as shown in Figure 7. The sampling
interval begins as the bit preceding the MSBF bit is shifted
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