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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | LTC1164-6CSW#PBF |
| 寤犲晢锛� | Linear Technology |
| 鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 6/12闋�(y猫) |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC FILTR 8TH ORDR LOWPASS 16SOIC |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 47 |
| 婵炬尝鍣ㄩ鍨嬶細 | 姗㈠湏鎴栬矟濉炵埦浣庨€� |
| 闋荤巼 - 鎴鎴栦腑蹇冿細 | 30kHz |
| 婵炬尝鍣ㄦ暩(sh霉)锛� | 1 |
| 婵炬尝鍣ㄩ殠鏁�(sh霉)锛� | 8th |
| 闆绘簮闆诲锛� | 4.75 V ~ 16 V锛�±2.375 V ~ 8 V |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 16-SOIC锛�0.295"锛�7.50mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 16-SOIC |
| 鍖呰锛� | 绠′欢 |
绗�1闋�(y猫)绗�2闋�(y猫)绗�3闋�(y猫)绗�4闋�(y猫)绗�5闋�(y猫)鐣�(d膩ng)鍓嶇6闋�(y猫)绗�7闋�(y猫)绗�8闋�(y猫)绗�9闋�(y猫)绗�10闋�(y猫)绗�11闋�(y猫)绗�12闋�(y猫)
3
LTC1164-6
11646fa
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Maximum fCLK (Table 3)
VS 鈮� 卤7.5V
1.5
MHz
VS 鈮� 卤5V
1.0
MHz
VS = Single 5V, AGND = 2V
1.0
MHz
Clock Feedthrough
Input at GND, f = fCLK, Square Wave
VS = 卤7.5V, (fCLK/fC) = 100:1
500
VRMS
VS = 卤5V, (fCLK/fC) = 50:1
200
VRMS
Wideband Noise
Input at GND, 1Hz
鈮� f < fCLK
VS = 卤7.5V
115
卤 5%
VRMS
VS = 卤2.5V
100
卤 5%
VRMS
Input Impedance
45
75
110
k
Output DC Voltage Swing
VS = 卤2.375V
鈼�
卤1.25
卤1.50
V
VS = 卤5V
鈼�
卤3.70
卤4.10
V
VS = 卤7.5V
鈼�
卤5.40
卤5.90
V
Output DC Offset
VS = 卤5V, (fCLK/fC) = 100:1
卤100
卤160
mV
Output DC Offset Tempco
VS = 卤5V, (fCLK/fC) = 100:1
卤100
V/掳C
Power Supply Current
VS = 卤2.375V, TA > 25掳C
2.5
4.0
mA
鈼�
4.5
mA
VS = 卤5V, TA > 25掳C
4.5
7.0
mA
鈼�
8.0
mA
VS = 卤7.5V, TA > 25掳C
7.0
11.0
mA
鈼�
12.5
mA
Power Supply Range
卤2.375
卤8V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Connecting any pin to voltages greater than V
+ or less than V鈥�
may cause latch-up. It is recommended that no sources operating from
external supplies be applied prior to power-up of the LTC1164-6.
Note 3: All gains are measured relative to passband gain.
Note 4: The cutoff frequency of the filter is abbreviated as fCUTOFF or fC.
Stopband Gain vs Frequency
(Elliptic Response)
CC
HARA TERISTICS
UW
A
TYPICALPERFOR
CE
Stopband Gain vs Frequency
(Elliptic Response)
FREQUENCY (kHz)
2
GAIN
(dB)
10
0
鈥�10
鈥�20
鈥�30
鈥�40
鈥�50
鈥�60
鈥�70
鈥�80
鈥�90
18
1164-6 G02
6
10
14
22
4
8
12
16
20
VS = 卤5V
fCLK = 250kHz
(fCLK/fC) = 50:1
(PIN 10 AT V+)
TA = 25掳C
WITH EXTERNAL
SINGLE POLE LOW-
PASS RC FILTER
(f鈥� 3dB = 10kHz)
FREQUENCY (kHz)
GAIN
(dB)
10
0
鈥�10
鈥�20
鈥�30
鈥�40
鈥�50
鈥�60
鈥�70
鈥�80
鈥�90
1164-6 G01
218
6
10
14
22
4
8
12
16
20
VS = 卤5V
fCLK = 500kHz
fC = 5kHz
(fCLK/fC) = 100:1
(PIN 10 AT V 鈥�)
TA = 25掳C
ELECTRICAL C
C
HARA TERISTICS The 鈼� denotes specifications that apply over the full operating temperature
range, otherwise specifications are at TA = 25掳C. VS = 卤7.5V, RL = 10k, TA = 25掳C, fCLK = 400kHz, TTL or CMOS level (maximum clock
rise or fall time
鈮� 1s) and all gain measurements are referenced to passband gain, unless otherwise specified. (fCLK/fCUTOFF) = 4kHz
at 100:1 and 8kHz at 50:1.
鐩搁棞(gu膩n)PDF璩囨枡 |
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
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