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參數(shù)資料
| 型號： | LTC1197I |
| 廠商： | Linear Technology Corporation |
| 英文描述： | 10-Bit, 500ksps ADCs in MSOP with Auto Shutdown |
| 中文描述： | 10位，500ksps，采用MSOP與ADC的自動關機 |
| 文件頁數(shù)： | 19/28頁 |
| 文件大小： | 446K |
| 代理商： | LTC1197I |
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19
LTC1197/LTC1197L
LTC1199/LTC1199L
U
S
A
O
PPLICATI
U
U
The effective resolution of the LTC1197/LTC1197L can be
increased by reducing the input span of the converter. The
LTC1197/LTC1197L exhibits good linearity and gain over
a wide range of reference voltages (see typical curves of
Linearity and Full-Scale Error vs Reference Voltage). How-
ever, care must be taken when operating at low values of
V
REF
because of the reduced LSB step size and the
resulting higher accuracy requirement placed on the con-
verter. The following factors must be considered when
operating at low V
REF
values.
1. Offset
2. Noise
3. Conversion speed (CLK frequency)
Offset with Reduced V
REF
The offset of the LTC1197/LTC1197L has a larger effect on
the output code when the ADC is operated with reduced
reference voltage. The offset (which is typically a fixed
voltage) becomes a larger fraction of an LSB as the size of
the LSB is reduced. The typical curve of LTC1197 Offset
Error vs Reference Voltage shows how offset in LSBs is
related to reference voltage for a typical value of V
OS
. For
example, a V
OS
of 1mV which is 0.2LSB with a 5V reference
becomes 1LSB with a 1V reference and 5LSBs with a 0.2V
reference. If this offset is unacceptable, it can be corrected
digitally by the receiving system or by offsetting the “–”
input of the LTC1197/LTC1197L.
Noise with Reduced V
REF
The total input referred noise of the LTC1197/LTC1197L
can be reduced to approximately 200
μ
V peak-to-peak
using a ground plane, good bypassing, good layout tech-
niques and minimizing noise on the reference inputs. This
noise is insignificant with a 5V reference but will become
a larger fraction of an LSB as the size of the LSB is reduced.
For operation with a 5V reference, the 200
μ
V noise is
only 0.04LSB peak-to-peak. In this case, the LTC1197/
LTC1197L noise will contribute virtually no uncertainty
to the output code. However, for reduced references, the
noise may become a significant fraction of an LSB and
cause undesirable jitter in the output code. For example,
with a 1V reference, this same 200
μ
V noise is 0.2LSB
peak-to-peak. This will reduce the range of input volt-
ages over which a stable output code can be achieved. If
the reference is further reduced to 200mV, the 200
μ
V of
noise becomes equal to 1LSB and a stable code may be
difficult to achieve. In this case averaging readings may
be necessary.
This noise data was taken in a very clean setup. Any setup-
induced noise (noise or ripple on V
CC
, V
REF
or V
IN
) will add
to the internal noise. The lower the reference voltage to be
used, the more critical it becomes to have a clean, noise-
free setup.
Conversion Speed with Reduced V
REF
With reduced reference voltages the LSB step size is
reduced and the LTC1197/LTC1197L internal comparator
overdrive is reduced. Therefore, it may be necessary to
reduce the maximum CLK frequency when low values of
V
REF
are used.
Input Divider
It is OK to use an input divider on the reference input of the
LTC1197/LTC1197L as long as the reference input can be
made to settle within the bit time at which the clock is
running. When using a larger value resistor divider on the
reference input the “–” input should be matched with an
equivalent resistance.
Bypassing Reference Input with Divider
Bypassing the reference input with a divider is also pos-
sible. However, care must be taken to make sure that the
DC voltage on the reference input will not drop too much
below the intended reference voltage.
相關PDF資料 |
PDF描述 |
|---|---|
| LTC1197L | 10-Bit, 500ksps ADCs in MSOP with Auto Shutdown |
| LTC1199LI | 10-Bit, 500ksps ADCs in MSOP with Auto Shutdown |
| LTC1199CS8 | 10-Bit, 500ksps ADCs in MSOP with Auto Shutdown |
| LTC1199I | 10-Bit, 500ksps ADCs in MSOP with Auto Shutdown |
| LTC1199LC | 10-Bit, 500ksps ADCs in MSOP with Auto Shutdown |
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