參數(shù)資料
型號: LTC1198-2BC
廠商: Linear Technology Corporation
英文描述: 8-Bit, SO-8, 1MSPS ADCs with Auto-Shutdown Options
中文描述: 8位,SO - 8封裝,帶自動1MSPS ADC的關斷選項
文件頁數(shù): 11/28頁
文件大小: 452K
代理商: LTC1198-2BC
11
LTC1196/LTC1198
PI FU
LTC1196
CS (Pin 1):
Chip Select Input. A logic low on this input
enables the LTC1196. A logic high on this input disables
the LTC1196.
IN
+
(Pin 2):
Analog Input. This input must be free of noise
with respect to GND.
IN
(Pin 3):
Analog Input. This input must be free of noise
with respect to GND.
GND (Pin 4):
Analog Ground. GND should be tied directly
to an analog ground plane.
V
REF
(Pin 5):
Reference Input. The reference input defines
the span of the A/D converter and must be kept free of
noise with respect to GND.
D
OUT
(Pin 6):
Digital Data Output. The A/D conversion
result is shifted out of this output.
CLK (Pin 7):
Shift Clock. This clock synchronizes the serial
data transfer.
V
CC
(Pin 8):
Power Supply Voltage. This pin provides
power to the A/D converter. It must be kept free of noise
and ripple by bypassing directly to the analog ground
plane.
U
LTC1198
CS/SHUTDOWN (Pin 1):
Chip Select Input. A logic low on
this input enables the LTC1198. A logic high on this input
disables the LTC1198 and DISCONNECTS THE POWER TO
THE LTC1198.
CHO (Pin 2):
Analog Input. This input must be free of noise
with respect to GND.
CH1 (Pin 3):
Analog Input. This input must be free of noise
with respect to GND.
GND (Pin 4):
Analog Ground. GND should be tied directly
to an analog ground plane.
D
IN
(Pin 5):
Digital Data Input. The multiplexer address is
shifted into this input.
D
OUT
(Pin 6):
Digital Data Output. The A/D conversion
result is shifted out of this output.
CLK (Pin 7):
Shift Clock. This clock synchronizes the serial
data transfer.
V
CC
(V
REF
)(Pin 8):
Power Supply and Reference Voltage.
This pin provides power and defines the span of the A/D
converter. It must be kept free of noise and ripple by
bypassing directly to the analog ground plane.
W
IAGRA
BLOCK
+
C
SMPL
BIAS AND
SHUTDOWN CIRCUIT
SERIAL PORT
V
CC
(V
CC
/V
REF
)
CLK
D
OUT
IN
+
(CH0)
IN
(CH1)
HIGH SPEED
COMPARATOR
CAPACITIVE DAC
SAR
V
REF
(D
IN
)
GND
PIN NAMES IN PARENTHESES
REFER TO THE LTC1198
CS
(CS/SHUTDOWN)
1196/98 BD
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