The data on the DIN in" />
參數(shù)資料
型號(hào): LTC1257CN8#PBF
廠商: Linear Technology
文件頁(yè)數(shù): 11/12頁(yè)
文件大?。?/td> 0K
描述: IC D/A CONV 12BIT VOLT OUT 8-DIP
標(biāo)準(zhǔn)包裝: 50
設(shè)置時(shí)間: 6µs
位數(shù): 12
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 1.75mW
工作溫度: 0°C ~ 70°C
安裝類型: 通孔
封裝/外殼: 8-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 8-PDIP
包裝: 管件
輸出數(shù)目和類型: 1 電壓,單極
采樣率(每秒): *
產(chǎn)品目錄頁(yè)面: 1350 (CN2011-ZH PDF)
LTC1257
8
1257fc
TYPICAL APPLICATIONS
OPERATION
Serial Interface
The data on the DIN input is loaded into the shift register
on the rising edge of the clock. The MSB is loaded first
and the LSB last. The DAC register loads the data from
the shift register when LOAD is pulled low, and remains
transparentuntilLOADispulledhighandthedataislatched.
An internal 5V regulator provides the supply for the digital
logic. By limiting the internal digital signal swings to 5V,
digital noise is reduced. The buffered output of the 12-bit
shift register is available on the DOUT pin which will swing
from GND to VCC.
Multiple LTC1257s may be daisy chained together by
connecting the DOUT pin to the DIN pin of the next chip,
while the clock and load signals remain common to all
chips in the daisy chain. The serial data is clocked to all
of the chips, then the LOAD signal is pulled low to update
all of them simultaneously. The maximum clocking rate
is 1.4MHz.
Reference
The LTC1257 includes an internal 2.048V reference, mak-
ing 1LSB equal to 500V. The internal reference output
is turned off when the pin is forced above the reference
voltage, allowing an external reference to be connected to
the reference pin. The external reference must be greater
than 2.475V and less than VCC – 2.7V, and be capable of
driving the 10k minimum DAC resistor ladder.
If the reference output is driving a large capacitive load, a
series resistor must be added to insure stability. For any
capacitive load greater than 1F, a 10Ω series resistor
will suffice.
Voltage Output
The LTC1257 voltage output is able to pull within 2.7V of
VCC while sourcing 2mA. A internal NMOS transistor with
a 200Ω equivalent impedance pulls the output to ground.
The output is protected against short circuits and is able
to drive up to a 500pF capacitive load without oscillation.
If digital noise on the output causes a problem, a simple
100Ω, 0.1F RC circuit can be used to filter the noise.
DAC with External Reference
Filtering VREF and VOUT
P
15V
0.1F
CONTROL OUTPUT
VCC
VREF
GND
VOUT
DIN
CLK
LOAD
DOUT
LTC1257
1257 TA03
IN
OUT
GND
LT1021-10
0.1F
1F
VCC
VREF
GND
VOUT
DIN
CLK
LOAD
DOUT
LTC1257
1257 TA06
10
5%
100
5%
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