參數(shù)資料
型號(hào): LTC1272
廠商: Linear Technology Corporation
英文描述: 12-Bit, 3us, 250kHz Sampling A/D Converter
中文描述: 12位,3us,至250kHz采樣A / D轉(zhuǎn)換器
文件頁(yè)數(shù): 4/20頁(yè)
文件大?。?/td> 340K
代理商: LTC1272
LTC1272
4
LTC1272-XA/C
MIN
0
SYMBOL
t
1
t
2
PARAMETER
CS to RD Setup Time
RD to BUSY Delay
CONDITIONS
TYP
MAX
UNITS
G
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μ
s
ns
ns
ns
C
L
= 50pF
COM Grade
C
L
= 20pF
COM Grade
C
L
= 100pF
COM Grade
80
190
230
90
110
125
150
G
t
3
Data Access Time After RD
50
G
70
G
t
4
RD Pulse Width
t
3
t
3
0
COM Grade
G
t
5
t
6
CS to RD Hold Time
Data Setup Time After BUSY
G
40
70
90
75
85
COM Grade
G
t
7
Bus Relinquish Time
20
20
0
0
200
1
30
COM Grade
G
t
8
t
9
t
10
t
11
t
12
t
13
HBEN to RD Setup Time
HBEN to RD Hold Time
Delay Between RD Operations
Delay Between Conversions
Aperture Delay of Sample and Hold
CLK to BUSY Delay
G
G
G
Jitter <50ps
25
80
170
220
13
COM Grade
G
t
CONV
Conversion Time
G
12
CLK
CYCLES
C
HARA TERISTICS
G
TI
U
I
The
G
indicates specifications which apply over the full operating
temperature range; all other limits and typicals T
A
= 25
°
C.
Note 1:
Absolute maximum ratings are those values beyond which the life
of a device may be impaired.
Note 2:
All voltage values are with respect to ground with DGND and
AGND wired together, unless otherwise noted.
Note 3:
When the analog input voltage is taken below ground it will be
clamped by an internal diode. This product can handle, with no external
diode, input currents of greater than 60mA below ground without latch-up.
Note 4:
V
DD
= 5V, f
CLK
= 4MHz for LTC1272-3, and 1.6MHz for
LTC1272-8, t
r
= t
f
= 5ns unless otherwise specified. For best analog
performance, the LTC1272 clock should be synchronized to the RD and
CS control inputs with at least 40ns separating convert start from the
nearest clock edge.
Note 5:
Linearity error is specified between the actual end points of the
A/D transfer curve.
Note 6:
The LTC1272 has the same 0V to 5V input range as the AD7572
but, to achieve single supply operation, it provides a 2.42V reference
output instead of the –5.25V of the AD7572. This requires that the polarity
of the reference bypass capacitor be reversed when plugging an LTC1272
into an AD7572 socket.
Note 7:
Guaranteed by design, not subject to test.
Note 8:
V
DD
= 5V. Timing specifications are sample tested at 25
°
C to
ensure compliance. All input control signals are specified with t
r
= t
f
= 5ns
(10% to 90% of 5V) and timed from a voltage level of 1.6V. See Figures 13
through 17.
(Note 8)
相關(guān)PDF資料
PDF描述
LTC1272-3ACN 12-Bit, 3us, 250kHz Sampling A/D Converter
LTC1272-3ACS 12-Bit, 3us, 250kHz Sampling A/D Converter
LTC1272-3CCS 12-Bit, 3us, 250kHz Sampling A/D Converter
LTC1272-8ACN 12-Bit, 3us, 250kHz Sampling A/D Converter
LTC1272-8ACS 12-Bit, 3us, 250kHz Sampling A/D Converter
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