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參數(shù)資料
| 型號(hào)： | LTC1276ACSW#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 20/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC A/D CONV 12BIT SAMPLNG 24SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 300k |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 75mW |
| 電壓電源： | 雙 ± |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SOIC |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個(gè)單端，單極；1 個(gè)單端，雙極 |
5
LTC1273
LTC1275/LTC1276
127356fa
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
t3
Data Access Time After RD
↓
CL = 20pF
40
90
ns
Commercial
●
110
ns
Military
●
120
ns
CL = 100pF
50
125
ns
Commercial
●
150
ns
Military
●
170
ns
t4
RD Pulse Width
●
t3
ns
t5
CS to RD Hold Time
●
0ns
t6
Data Setup Time After BUSY
↑
40
70
ns
Commercial
●
90
ns
Military
●
100
ns
t7
Bus Relinquish Time
20
30
75
ns
Commercial
●
20
85
ns
Military
●
20
90
ns
t8
HBEN to RD Setup Time
●
0ns
t9
HBEN to RD Hold Time
●
0ns
t10
Delay Between RD Operations
●
40
ns
t11
Delay Between Conversions
(Note 10)
500
ns
Commercial
●
600
ns
Military
●
1000
ns
t12
Aperture Delay of Sample-and-Hold
25
ns
LTC1273A/LTC1275A/LTC1276A
LTC1273B/LTC1275B/LTC1276B
Note 6: Linearity, offset and full scale specifications apply for unipolar and
bipolar modes.
Note 7: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 8: Bipolar offset (LTC1275/LTC1276) is the different voltage
measured from – 0.5LSB when the LTC1275/LTC1276 output code flickers
between 0000 0000 0000 and 1111 1111 1111.
Note 9: Guaranteed by design, not subject to test.
Note 10: Recommended operating conditions.
Note11: AIN must not exceed VDD or fall below VSS by more than 50mV for
specified accuracy. Therefore the minimum supply voltage for the
LTC1273 is + 4.95V. The minimum supplies for the LTC1275 are +4.75V
and – 2.45V and the minimum supplies for the LTC1276 are
±4.95V.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to ground with DGND and
AGND wired together (unless otherwise noted).
Note 3: When these pin voltages are taken below VSS (ground for
LTC1273) or above VDD, they will be clamped by internal diodes. This
product can handle input currents greater than 60mA below VSS (ground
for LTC1273) or above VDD without latch-up.
Note 4: When these pin voltages are taken below VSS (ground for
LTC1273) they will be clamped by internal diodes. This product can handle
input currents greater than 60mA below VSS (ground for LTC1273)
without latch-up. These pins are not clamped to VDD.
Note 5: VDD = 5V (VSS = – 5V for LTC1275/LTC1276), 300kHz at 70°C and
250kHz at 125
°C, tr = tf = 5ns unless otherwise specified.
TI I G CHARACTERISTICS
W U
The
● denotes the specifications which apply over the full operating temperature
range, otherwise specfications are at TA = 25°C. See Timing Characteristics Figures (Note 5)
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