The VREF
參數(shù)資料
型號: LTC1282ACSW#TR
廠商: Linear Technology
文件頁數(shù): 5/24頁
文件大?。?/td> 0K
描述: IC ADC 12BIT SAMPLING REF 24SOIC
標準包裝: 1,000
位數(shù): 12
采樣率(每秒): 140k
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 24mW
電壓電源: 雙 ±
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
供應商設備封裝: 24-SOIC
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 1 個單端,單極;1 個單端,雙極
13
LTC1282
U
S
A
O
PPLICATI
WU
U
I FOR ATIO
Overdriving the Internal Reference
The VREF pin can be driven above its normal value with a
DAC or other means to provide input span adjustment.
Figure 6 shows an LT1006 op amp driving the reference
pin. The VREF pin must be driven to at least 1.25V to
prevent conflict with the internal reference. The reference
should be driven to no more than 1.44V in unipolar mode
or 2.88V for bipolar mode to keep the input span within the
single 3V or
±3V supplies.
Figure 6. Driving the VREF with the LT1006 Op Amp
natural binary with 1LSB = FS/4096 = 2.5V/4096 = 0.61mV.
Figure 9 shows the input/output transfer characteristics
for the LTC1282 in bipolar operation. The full scale for
LTC1282 in bipolar mode is still 2.5V and 1LSB = 0.61mV.
UNIPOLAR/BIPOLAR OPERATION AND ADJUSTMENT
Figure 8 shows the ideal input/output characteristics for
the LTC1282. The code transitions occur midway be-
tween successive integer LSB values (i.e., 0.5LSB,
1.5LSBs, 2.5LSBs, FS – 1.5LSBs). The output code is
Figure 7. Supplying a 2.5V Reference Voltage
to the LTC1282 with the LT1019A-2.5
Figure 7 shows a typical reference, the LT1019A-2.5
connected to the LTC1282 operating in bipolar mode. This
will provide an improved drift (due to the 5ppm/
°C of the
LT1019A-2.5) and a
±2.604V full scale.
INPUT VOLTAGE (V)
0V
OUTPUT
CODE
FS – 1LSB
LTC1282 F8
111...111
111...110
111...101
111...100
000...000
000...001
000...010
000...011
1
LSB
UNIPOLAR
ZERO
1LSB = FS/4096
FS = 2.5V
Figure 8. LTC1282 Unipolar Transfer Characteristic
Figure 9. LTC1282 Bipolar Transfer Characteristic
Unipolar Offset and Full-Scale Adjustment
In applications where absolute accuracy is important,
offset and full-scale errors can be adjusted to zero. Figure
10 shows the extra components required for full-scale
error adjustment. If both offset and full-scale adjust-
ments are needed, the circuit in Figure 11 can be used.
Offset should be adjusted before full scale. To adjust
INPUT VOLTAGE (V)
0V
OUTPUT
CODE
–1
LSB
LTC1282 F09
011...111
011...110
000...001
000...000
100...000
100...001
100...010
1
LSB
BIPOLAR
ZERO
111...111
FS/2 – 1LSB
–FS/2
FS = 2.5V
1LSB = FS/4096
111...110
VREF(OUT) ≥ 1.25V
3
INPUT RANGE
±1.033VREF(OUT)
+
LT1006
10
F
LTC1282 F06
LTC1282
AIN
AGND
VREF
VDD
VSS
3V
–3V
3
INPUT RANGE
±2.60V
LTC1282
AIN
AGND
VREF
10
F
LTC1282 F07
LT1019A-2.5
VIN
GND
VOUT
5V
VDD
VSS
3V
–3V
+
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