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參數(shù)資料
| 型號(hào)： | LTC1282ACSW |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 3V 140ksps 12-Bit Sampling A/D Converter with Reference |
| 中文描述： | 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24 |
| 封裝： | 0.300 INCH, PLASTIC, SOP-24 |
| 文件頁數(shù)： | 14/24頁 |
| 文件大小： | 439K |
| 代理商： | LTC1282ACSW |
14
LTC1282
U
S
A
offset, apply 0.305mV (i.e., 0.5LSB) at V1 and adjust the
op amp offset voltage until the LTC1282 output code
flickers between 0000 0000 0000 and 0000 0000 0001.
For zero full-scale error, apply an analog input of 2.49909V
(i.e., FS – 1.5
LSBs or last code transition) at the input and
adjust the full-scale trim until the LTC1282 output code
flickers between 1111 1111 1110 and 1111 1111 1111.
O
PPLICATI
U
U
Figure 10. Full-Scale Adjust Circuit
Figure 11. Unipolar Offset and Full-Scale Adjust Circuit
Figure 12. Bipolar Offset and Full-Scale Adjust Circuit
error adjustment is achieved by trimming the offset ad-
justment of Figure 12 while the input voltage is 0.5LSB
below ground. This is done by applying an input voltage of
–0.305mV (–0.5LSB for LTC1282) to the input in Figure
12 and adjusting R8 until the ADC output code flickers
between 0000 0000 0000 and 1111 1111 1111. For full-
scale adjustment, an input voltage of 1.24909V (FS –
1.5LSBs for LTC1282) is applied to the input and R5 is
adjusted until the output code flickers between 0111 1111
1110 and 0111 1111 1111.
BOARD LAYOUT AND BYPASSING
The LTC1282 is easy to use. To obtain the best perfor-
mance from the device, a printed circuit board is recom-
mended. Layout for the printed circuit board should en-
sure that digital and analog signal lines are separated as
much as possible. In particular, care should be taken not
to run any digital track alongside an analog signal track or
underneath the ADC. The analog input should be screened
by AGND.
High quality tantalum and ceramic bypass capacitors
should be used at the V
DD
and V
REF
pins as shown in Figure
13. In bipolar mode, a 0.1
μ
F ceramic provides adequate
bypassing for the V
SS
pin. The capacitors must be located
as close to the pins as possible. The traces connecting the
pins and the bypass capacitors must be kept short and
should be made as wide as possible.
Bipolar Offset and Full-Scale Adjustment
Bipolar offset and full-scale errors are adjusted in a
similar fashion to the unipolar case. Figure 10 shows the
extra components required for full-scale error adjust-
ment. If both offset and full-scale adjustments are needed,
the circuit in Figure 12 can be used. Again, bipolar offset
must be adjusted before full-scale error. Bipolar offset
LTC1282
A
IN
AGND
LTC1282 F10
R4
100
FULL-SCALE
ADJUST
R5
10k
R2
10k
R1
50
V
1
–
+
A1
ADDITIONAL PINS OMITTED FOR CLARITY
±
20LSB TRIM RANGE
A
IN
LTC1282 F11
R2
10k
R4
100k
R5
4.3k
FULL-SCALE
ADJUST
R1
10k
10k
5V
R9
20
ANALOG
INPUT
0V TO 2.5V
R3
100k
5V
R8
10k
OFFSET
ADJUST
R6
400
R7
100k
–
+
LTC1282
A
IN
LTC1282 F12
R2
10k
R4
100k
R5
4.3k
FULL-SCALE
ADJUST
R1
10k
ANALOG
INPUT
±
1.25V
R3
100k
5V
R8
20k
OFFSET
ADJUST
R6
200
R7
100k
–
+
LTC1282
–5V
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LTC1282BC | 3V 140ksps 12-Bit Sampling A/D Converter with Reference |
| LTC1282BCN | 3V 140ksps 12-Bit Sampling A/D Converter with Reference |
| LTC1282BCSW | 3V 140ksps 12-Bit Sampling A/D Converter with Reference |
| LTC1282 | 3V 140ksps 12-Bit,Sampling A/D Converter with Reference(3V,140ksps,12位,采樣模數(shù)轉(zhuǎn)換器(帶基準(zhǔn))) |
| LTC1283AC | 3V Single Chip 10-Bit Data Acquisition System |
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