參數(shù)資料
型號(hào)： LTC1286IS8#TR
廠商： Linear Technology
文件頁(yè)數(shù)： 10/24頁(yè)
文件大?。?/td> 0K
描述： IC ADC 12BIT SAMPL MCRPWR 8SOIC
標(biāo)準(zhǔn)包裝： 2,500
位數(shù)： 12
采樣率（每秒）： 12.5k
數(shù)據(jù)接口： MICROWIRE?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 1.25mW
電壓電源： 單電源
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 8-SOIC
包裝： 帶卷 (TR)
輸入數(shù)目和類(lèi)型： 1 個(gè)差分，單極
18
LTC1286/LTC1298
0.2V reference. If this offset is unacceptable, it can be
corrected digitally by the receiving system or by offsetting
the “–” input of the LTC1286.
Noise with Reduced VREF
The total input referred noise of the LTC1286 can be
reduced to approximately 400
V peak-to-peak using a
ground plane, good bypassing, good layout techniques
and minimizing noise on the reference inputs. This noise
is insignificant with a 5V reference but will become a larger
fraction of an LSB as the size of the LSB is reduced.
For operation with a 5V reference, the 400
V noise is
only 0.33LSB peak-to-peak. In this case, the LTC1286
noise will contribute virtually no uncertainty to the
output code. However, for reduced references the noise
may become a significant fraction of an LSB and cause
undesirable jitter in the output code. For example, with
a 2.5V reference this same 400
V noise is 0.66LSB
peak-to-peak. This will reduce the range of input volt-
ages over which a stable output code can be achieved by
1LSB. If the reference is further reduced to 1V, the 400
V
noise becomes equal to 1.65LSBs and a stable code may
be difficult to achieve. In this case averaging multiple
readings may be necessary.
This noise data was taken in a very clean setup. Any setup
induced noise (noise or ripple on VCC, VREF or VIN) will add
to the internal noise. The lower the reference voltage to be
used the more critical it becomes to have a clean, noise free
setup.
Conversion Speed with Reduced VREF
With reduced reference voltages, the LSB step size is
reduced and the LTC1286 internal comparator over-
drive is reduced. Therefore, it may be necessary to
reduce the maximum CLK frequency when low values
of VREF are used.
DYNAMIC PERFORMANCE
The LTC1286/LTC1298 have exceptional sampling capa-
bility. Fast Fourier Transform (FFT) test techniques are
used to characterize the ADC’s frequency response, dis-
APPLICATION INFORMATION
WU
U
tortion and noise at the rated throughput. By applying a low
distortion sine wave and analyzing the digital output using
an FFT algorithm, the ADC’s spectral content can be
examined for frequencies outside the fundamental. Figure
11 shows a typical LTC1286 plot.
Signal-to-Noise Ratio
The Signal-to-Noise plus Distortion Ratio (S/N + D) is the
ratio between the RMS amplitude of the fundamental
input frequency to the RMS amplitude of all other fre-
quency components at the ADC’s output. The output is
band limited to frequencies above DC and below one half
the sampling frequency. Figure 12 shows a typical spec-
tral content with a 12.5kHz sampling rate.
Effective Number of Bits
The Effective Number of Bits (ENOBs) is a measurement of
the resolution of an ADC and is directly related to S/(N+D)
by the equation:
ENOB = [S/(N + D) – 1.76]/6.02
where S/(N + D) is expressed in dB. At the maximum
sampling rate of 12.5kHz with a 5V supply, the LTC1286
maintains above 11 ENOBs at 10kHz input frequency.
Above 10kHz the ENOBs gradually decline, as shown in
Figure 12, due to increasing second harmonic distortion.
The noise floor remains low.
FREQUENCY (kHz)
0
–60
–40
0
35
LTC 1286/98 G21
–80
–100
12
46
7
–120
–140
–20
MAGNITUDE
(dB)
TA = 25°C
VCC = VREF = 5V
fIN = 5kHz
fCLK = 200kHz
fSMPL = 12.5kHz
Figure 11. LTC1286 Non-Averaged, 4096 Point FFT Plot
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