參數(shù)資料
型號: LTC1289CCJ
廠商: LINEAR TECHNOLOGY CORP
元件分類: ADC
英文描述: 3 Volt Single Chip 12-Bit Data Acquisition System
中文描述: 8-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, CDIP20
封裝: 0.300 INCH, CERDIP-20
文件頁數(shù): 25/28頁
文件大?。?/td> 487K
代理商: LTC1289CCJ
25
LTC1289
LDA #$50
STA
LDA #$FF
STA
BSET 0, $02
JSR
Configuration data for SPCR
Load configuration data into $0A
Configuration data for port C DDR
Load configuration data into port C DDR
Make sure CS is high
Dummy read configures LTC1289 for
next read
Read CH6 with respect to CH7
Read CH7 with respect to CH6
Determines which reading has valid
data, converts to 2's complement and
stores in RAM
Load D
IN
word for LTC1289 into ACC
Read LTC1289 routine
Load MSBs from LTC1289 in ACC
Store MSBs in $71
Load LSBs from LTC1289 in ACC
Store LSBs in $72
Return
$0A
$06
READ –/+
JSR
JSR
JSR
READ +/–
READ –/+
CHK SIGN
READ –/+:
LDA #$3F
JSR
LDA $60
STA
LDA $61
STA
RTS
TRANSFER
$71
$72
U
S
A
O
PPLICATI
TYPICAL
SNEAK-A-BIT Code for the LTC1289 Using the MC68HC05C4
SNEAK-A-BIT Code
SNEAK-A-BIT Code for the LTC1289 Using the MC68HC05C4
MNEMONIC
DESCRIPTION
D
OUT
from LTC1289 in MC68HC05C4 RAM
Location $77B12B11B10B9B8B7B6B5
Location $87B4B3B2B1B0illed with 0s
D
IN
words for LTC1289
Sign
LSB
MUX Addr.
UNI
MSBF
Word
Length
D
IN
100111111
D
IN
201111111
D
IN
300111111
(ODD/SIGN)
LTC1289 TA05
MNEMONIC
DESCRIPTION
READ +/–:
LDA
JSR
LDA
STA
LDA
STA
RTS
#$7F
TRANSFER
$60
$73
$61
$74
Load D
IN
word for LTC1289 into ACC
Read LTC1289 routine
Load MSBs from LTC1289 into ACC
Store MSBs in $73
Load LSBs from LTC1289 into ACC
Store LSBs in $74
Return
CS goes low
Load D
IN
into SPI. Start transfer
Test status of SPIF
Loop to previous instruction if not done
Load contents of SPI data reg into ACC
Start next cycle
Store MSBs in $60
Test status of SPIF
Loop to previous instruction if not done
CS goes high
Load contents of SPI data reg into ACC
Store LSBs in $61
Return
Load MSBs of +/– read into ACC
Or ACC (MSBs) with LSBs of +/– read
If result is 0 goto minus
Clear carry
Rotate right $73 through carry
Rotate right $74 through carry
Load MSBs of +/– read into ACC
Store MSBs in RAM locations $77
Load LSBs of +/– read into ACC
Store LSBs in RAM location $87
Goto end of routine
Clear carry
Shift MSBs of –/+ read right
Shift LSBs of –/+ read right
1's complement of MSBs
1's complement of LSBs
Load LSBs into ACC
Add 1 to LSBs
Store ACC in $72
Clear ACC
Add with carry to MSBs. Result in ACC
Store ACC in $71
Store MSBs in RAM locations $77
Load LSBs in ACC
Store LSBs in RAM location $87
Return
TRANSFER: BCLR 0, $02
STA
TST
BPL
LDA
STA
STA
TST
BPL
BSET 0, $02
LDA
STA
RTS
LDA
ORA $74
BEQ
CLC
ROR $73
ROR $74
LDA
STA
LDA
STA
BRA
CLC
ROR $71
ROR $72
COM $71
COM $72
LDA
ADD #$01
STA
CLRA
ADC
STA
STA
LDA
STA
RTS
$0C
$0B
LOOP 1
$0C
$0C
$60
$0B
LOOP 2
LOOP 1:
LOOP 2:
$0C
$61
CHK SIGN:
$73
MINUS
$73
$77
$74
$87
END
MINUS:
$72
$72
$71
$71
$77
$72
$87
END:
相關(guān)PDF資料
PDF描述
LTC1289CCN 3 Volt Single Chip 12-Bit Data Acquisition System
LTC1289CCS 3 Volt Single Chip 12-Bit Data Acquisition System
LTC1289 Single Channel Codec-Bandwidth Independent of Sampling Rate 64-LQFP 0 to 70
LTC1289BCN Single Channel Codec-Bandwidth Independent of Sampling Rate 28-PLCC -40 to 85
LTC1289BCS Single Channel Codec-Bandwidth Independent of Sampling Rate 28-PLCC -40 to 85
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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