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參數(shù)資料
| 型號(hào)： | LTC1291CCN8 |
| 廠商： | Linear Technology |
| 文件頁(yè)數(shù)： | 10/20頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DATA ACQ SYSTEM 12BIT 8-DIP |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 類型： | 數(shù)據(jù)采集系統(tǒng)（DAS） |
| 分辨率（位）： | 12 b |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 電壓電源： | 單電源 |
| 電源電壓： | 5V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 8-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 8-PDIP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁(yè)面： | 1346 (CN2011-ZH PDF) |
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LTC1291
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Overvoltage Protection
Applying signals to the LTC1291’s analog inputs that
exceed the positive supply or that go below ground will
degrade the accuracy of the A/D and possibly damage the
device. For example, this condition will occur if a signal is
applied to the analog inputs before power is applied to the
LTC1291. It can also happen if the input source is operat-
ing from supplies of larger value than the LTC1291 supply.
These conditions should be prevented either with proper
supply sequencing or by use of external circuitry to clamp,
or current limit the input source.
There are two ways to protect the inputs. In Figure 13
diode clamps from the inputs to VCC and GND are used.
The second method is to put resistors in series with the
analog inputs for current limiting. Limit the current to
15mA per channel. The +IN input can accept a resistor
value of 1k but the –IN input cannot accept more than
250
when clocked at its maximum clock frequency of
1MHz. If the LTC1291 is clocked at the maximum clock
frequency and 250
is not enough to current limit the
input source, then the clamp diodes are recommended
(Figures 14 and 15). The reason for the limit on the resistor
value is that the MSB bit test is affected by the value of the
resistor placed at the –IN input (see discussion on Analog
Inputs and the typical performance characteristics Maxi-
mum CLK Rate vs Source Resistance).
Because a unique input protection structure is used on the
digital input pins, the signal levels on these pins can
exceed the device VCC without damaging the device.
5V
LTC1291 F13
CH0
GND
DIN
DOUT
CLK
VCC (VREF)
CS
CH1
1N4148 DIODES
LTC1291
5V
LTC1291 F14
CH0
GND
DIN
DOUT
CLK
CS
CH1
250
1k
LTC1291
VCC (VREF)
5V
LTC1291 F15
CH0
GND
DIN
DOUT
CLK
CS
CH1
LTC1291
1N4148 DIODES
1k
VCC (VREF)
Figure 13. Overvoltage Protection for Inputs
Figure 14. Overvoltage Protection for Inputs
Figure 15. Overvoltage Protection for Inputs
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