on two port lines and the DOUT signal is read on a third por" />
參數(shù)資料
型號： LTC1292DIN8
廠商： Linear Technology
文件頁數(shù)： 3/24頁
文件大?。?/td> 0K
描述： IC DATA ACQ SYSTEM 12BIT 8-DIP
標準包裝： 50
類型： 數(shù)據(jù)采集系統(tǒng)（DAS）
分辨率（位）： 12 b
采樣率（每秒）： 60k
數(shù)據(jù)接口： 串行，并聯(lián)
電壓電源： 單電源
電源電壓： 5V
工作溫度： -40°C ~ 85°C
安裝類型： 通孔
封裝/外殼： 8-DIP（0.300"，7.62mm）
供應商設備封裝： 8-PDIP
包裝： 管件
11
LTC1292/LTC1297
12927fb
on two port lines and the DOUT signal is read on a third port
line. After a falling CLK edge each data bit is loaded into the
carry bit and then rotated into the accumulator. Once the
first 8 MSBs have been shifted into the accumulator they
are loaded into register R2. The last four bits are shifted in
the same way and loaded into register R3. The output data
is left-justified in registers R2 and R3 (Figure 5).
For the LTC1297 four NOPs need to be inserted in the 8051
code after CS goes low to allow the LTC1297 to wake up
from power shutdown (tsuCS).
U
S
A
O
PPLICATI
WU
U
I FOR ATIO
LABEL MNEMONIC
OPERAND
COMMENTS
LDAA
#$50
CONFIGURATION DATA FOR SPCR
STAA
$1028
LOAD DATA INTO SPCR ($1028)
LDAA
#$1B
CONFIG. DATA FOR PORT D DDR
STAA
$1009
LOAD DATA INTO PORT D DDR
LDAA
#$00
LOAD DUMMY DIN WORD INTO
ACC A
STAA
$50
LOAD DUMMY DIN DATA INTO $0
LOOP
LDX
#$1000
LOAD INDEX REGISTER X WITH
$1000
LDAB
#$00
LOAD ACC B WITH $00
LDAA
$50
LOAD DIN INTO ACC FROM $50
BCLR
$08,X,$01
D0 GOES LOW (CS GOES LOW)
NOP
3 NOP FOR tsuCS TIMING
NOP
STAA
$102A
LOAD DUMMY DIN INTO SPI,
START CLK
LABEL MNEMONIC
OPERAND
COMMENTS
MC68HC11 CODE for LTC1297 Interface
LOOP1 LDAA
$1029
CHECK SPI STATUS REG
BPL
LOOP1
CHECK IF TRANSFER IS DONE
LDAA
$102A
LOAD LTC1297 MSBs INTO ACC A
STAA
$61
STORE MSBs IN $61
STAA
$102A
LOAD DUMMY DIN INTO SPI,
START SCK
LOOP2 LDAA
$1029
CHECK SPI STATUS RES
BPL
LOOP2
CHECK IF TRANSFER IS DONE
BSET
$08X,$01
D0 GOES HIGH (CS GOES HIGH)
LDAA
$102A
LOAD LTC1297 LSBs INTO ACC A
STAA
$62
STORE LSBs IN $62
ROR
$61
ROTATE RIGHT WITH CARRY
ROR
$62
NEEDED TO RIGHT JUSTIFY
ROR
$61
THE DATA IN $61 AND $62
ROR
$62
JMP
LOOP
START NEXT CONVERSION
BYTE 2
B3
B7
B6
B5
B4
B2
B0
B1
B10
B9
B8
B11
O
OO
BYTE 1
DOUT FROM LTC1297 STORED ON MC68HC11 RAM
LOCATION #61
LOCATION #62
MSB
LTC1292/7 F04
CLK
DOUT
LTC1297
CS
ANALOG
INPUTS
DO
SCK
MISO
MC68HC11
Figure 4. Hardware and Software Interface to Motorola MC68HC11 Microcontroller
The data is right- justified in the two memory locations by
rotating right twice (Figure 4). ANDing the first byte with
0FHEX clears the four most significant bits. This operation
was not included in the code. It can be inserted in the data
gathering loop or outside the loop when the data is
processed.
Interfacing to the Parallel Port of the Intel 8051 Family
The Intel 8051 has been chosen to show the interface
between the LTC1292/LTC1297 and parallel port
microprocessors. The signals CS and CLK are generated
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LTC1292DMJ8/883 制造商:Linear Technology 功能描述:Contact Factory, last orders March 30/01
LTC1293BCN 功能描述:IC DATA ACQ SYSTEM 12BIT 16-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:50 系列:- 類型:數(shù)據(jù)采集系統(tǒng)（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數(shù)據(jù)接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應商設備封裝:40-TQFN-EP（6x6） 包裝:托盤
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