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參數(shù)資料
| 型號(hào)： | LTC1348CSW |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset 14-SOIC 0 to 70 |
| 中文描述： | TRIPLE LINE TRANSCEIVER, PDSO28 |
| 封裝： | 0.300 INCH, PLASTIC, SO-28 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 243K |
| 代理商： | LTC1348CSW |
5
LTC1348
PI FU
V
CC
:
3V to 5.5V Input Supply Pin. This pin should be
decoupled with a 0.1
μ
F ceramic capacitor.
GND:
Ground Pin.
RXEN:
TTL/CMOS Compatible Enable Pin. Refer to Table
1 for its functional description.
DREN:
TTL/CMOS Compatible Enable Pin. Refer to Table
1 for its functional description.
V
+
:
Positive Supply Output (RS232 Drivers). This pin
requires an external capacitor C = 0.1
μ
F for charge stor-
age. The capacitor may be tied to ground or V
CC
. With
multiple devices, the V
+
and V
–
pins may be paralleled into
common capacitors. For large numbers of devices, in-
creasing the size of the shared common storage capaci-
tors is recommended to reduce ripple.
V
–
:
Negative Supply Output (RS232 Drivers). This pin
requires an external capacitor C = 0.1
μ
F for charge
storage.
C1
+
, C1
–
, C2
+
, C2
–
, C3
+
, C3
–
:
Commutating Capacitor
Inputs. These pins require three external capacitors C =
0.1
μ
F: one from C1
+
to C1
–
, another from C2
+
to C2
–
and
another from C3
+
to C3
–
. To maintain charge pump
U
efficiency, the capacitor’s effective series resistance should
be less than 1
. Ceramic capacitors are recommended.
DR IN:
RS232 Driver Input Pins. Inputs are TTL/CMOS
compatible. The inputs of unused drivers can be left
unconnected since 300k input pull-up resistors to V
CC
are
included on chip. To minimize power consumption, the
internal driver pull-up resistors are disconnected from V
CC
in the Shutdown or Receiver Alive mode.
DR OUT:
Driver Outputs at RS232 Voltage Levels. Outputs
are in a high impedance state when in the Shutdown,
Receiver Alive mode or V
CC
= 0V. The driver outputs are
protected against ESD to
±
10kV for human body model
discharges.
RX IN:
Receiver Inputs. These pins can be forced to
±
25V
without damage. The receiver inputs are protected against
ESD to
±
10kV for human body model discharges. Each
receiver provides 0.4V of hysteresis for noise immunity. In
Receiver Alive mode all receivers have no hysteresis.
RX OUT:
Receiver Outputs with TTL/CMOS Voltage Lev-
els. Outputs are in a high impedance state when in the
Shutdown or Receiver Disable mode to allow data line
sharing.
Table 1. Functional Description
MODE
RX ENABLE
Shutdown
DR ENABLE
0
DRIVERS
All Drivers Shutdown.
All Driver Outputs Assume High Impedance.
All Driver Pull-Up Resistors Disconnect
From V
CC
.
All Drivers Alive.
RECEIVERS
All Receivers Shutdown.
All Receiver Outputs Assume High Impedance.
I
CC
TYP
0.2
μ
A
0
Receiver
Disable
0
1
All Receiver Outputs in Three-State.
600
μ
A at
3.3V,
800
μ
A at
5V
Receiver
Alive
1
0
All Drivers Shutdown.
All Driver Outputs in Three-State.
All Driver Pull-Up Resistors Disconnect
From V
CC
.
All Drivers Alive.
All Receivers Alive.
15
μ
A
Normal
1
1
All Receivers Alive.
600
μ
A at
3.3V,
800
μ
A at
5V
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LTC1348I | Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset 14-SOIC 0 to 70 |
| LTC1349C | Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset 14-SOIC 0 to 70 |
| LTC1349CG | Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset 14-SOIC 0 to 70 |
| LTC1349CN | Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset 14-SOIC 0 to 70 |
| LTC1349CS | 5V Low Power RS232 3-Driver/5-Receiver Transceiver with 2 Receivers Active in SHUTDOWN |
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