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參數(shù)資料
| 型號： | LTC1402CGN |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | Serial 12-Bit, 2.2Msps Sampling ADC with Shutdown |
| 中文描述： | 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO16 |
| 封裝： | 0.150 INCH, PLASTIC, SSOP-16 |
| 文件頁數(shù)： | 12/20頁 |
| 文件大小： | 251K |
| 代理商： | LTC1402CGN |
12
LTC1402
APPLICATIO
S I
N
FOR
ATIO
U
INTERNAL REFERENCE
The LTC1402 has an on-chip, temperature compensated,
curvature corrected, bandgap reference that is factory
trimmed to 2.048V. It is connected internally to a reference
amplifier, see Figure 4. The reference amplifier amplifies
the voltage at the V
REF
pin by 2 to create the required
internal reference voltage of 4.096V. This provides buffer-
ing for the high speed capacitive DAC. The reference
amplifier output V
REF
, (Pin 5) must be bypassed with a
capacitor to ground. The reference amplifier is stable with
capacitors of 1
μ
F or greater. For the best noise perfor-
mance, a 10
μ
F ceramic or a 10
μ
F tantalum in parallel with
a 0.1
μ
F ceramic is recommended.
The V
REF
pin can be driven with an external reference as
shown in Figure 5a. The GAIN pin (Pin 7) is tied to the
positive supply to disable the internal reference buffer.
A DAC may also be used to drive V
REF
as shown in
Figure 6. This is useful in applications where the peak
input signal amplitude may vary. The input span of the
W
U
Figure 5a. Using the LT1019-2.5 as an External Reference
LTC1402
LT1019-2.5
A
IN+
ANALOG INPUT
5V
5V
A
IN–
V
REF
V
OUT
V
IN
AGND2
GAIN
1402 F04a
3
4
5
6
7
10
μ
F
LTC1402
LT1019-2.5
A
IN+
V
IN
2.5V
±
2.048V
5V
A
IN–
V
REF
BIP
V
IN
AGND2
14
V
SS
GAIN
1402 F04a
3
4
5
6
7
10
μ
F
10
μ
F
Figure 5b. Bipolar Mode with Single Supply
Figure 4. LTC1402 Reference Circuit
64k
64k
REFERENCE
AMP
10
μ
F
GAIN
V
REF
BANGAP
REFERENCE
5
7
AGND2
6
4.096V
LTC1402
+
–
2.048V
1402 F04
Figure 6. Driving V
REF
with a DAC
LTC1402
A
IN+
ANALOG INPUT
5V
A
IN–
V
REF
AGND2
GAIN
1402 F06
3
4
5
6
7
10
μ
F
LTC1450
ADC can then be adjusted to match the peak input signal,
maximizing the signal-to-noise ratio. The filtering of the
internal LTC1402 reference amplifier will limit the band-
width and settling time of this circuit. A settling time of
5ms should be allowed after a reference adjustment.
DIFFERENTIAL INPUTS
The LTC1402 has a unique differential sample-and-hold
circuit that allows inputs from –2.5V to 5V. The ADC will
always convert the difference of A
IN+
– A
IN–
independent
of the common mode voltage. The common mode rejec-
tion holds up at extremely high frequencies, see Figure 7.
The only requirement is that both inputs not exceed
–2.5V or 5V. Integral nonlinearity errors (INL) and differ-
ential nonlinearity errors (DNL) are independent of the
common mode voltage. However, the bipolar zero error
(BZE) will vary. The change in BZE is typically less than
0.1% of the common mode voltage. Figure 5b shows the
use of bipolar mode with single 5V supply.
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