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參數(shù)資料
| 型號： | LTC1405IGN#TR |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 15/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT 5MSPS SAMPLE 28SSOP |
| 標準包裝： | 2,500 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 5M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 145mW |
| 電壓電源： | 雙 ± |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-SSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 2 個單端，雙極；1 個差分，雙極 |
4
LTC1405
1405fa
DIGITAL I PUTS AND OUTPUTS
U
The
● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Specifications are guaranteed for both dual supply and single supply
operation. (Note 5)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
POWER REQUIRE E TS
W
U
The
● denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. Specifications are guaranteed for both dual supply and single supply operation.
(Note 5)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VDD
Positive Supply Voltage
(Note 10)
4.75
5.25
V
VSS
Negative Supply Voltage
Dual Supply Mode
– 5.25
– 4.75
V
Single Supply Mode
0
V
IDD
Positive Supply Current
●
23
28
mA
ISS
Negative Supply Current
●
0.8
1.2
mA
PD
Power Dissipation
●
115
145
mW
TI I G CHARACTERISTICS
W U
The
● denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. Specifications are guaranteed for both dual supply and single supply operation.
(Note 5)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
fSAMPLE
Sampling Frequency
●
0.02
5
MHz
tCONV
Conversion Time
●
150
180
ns
tACQ
Acquisition Time
●
20
50
ns
tH
CLK High Time
(Note 9)
●
20
100
ns
tL
CLK Low Time
(Note 9)
●
20
100
ns
tAD
Aperture Delay of Sample-and-Hold
– 250
ps
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to ground with GND and OGND
wired together (unless otherwise noted).
Note 3: When these pin voltages are taken below VSS or above VDD, they
will be clamped by internal diodes. This product can handle input currents
greater than 100mA below VSS or above VDD without latchup.
Note 4: When these pin voltages are taken below VSS they will be clamped
by internal diodes. This product can handle input currents greater than
100mA below VSS without latchup. GAIN is not clamped to VDD. When CLK
is taken above VDD, it will be clamped by an internal diode. The CLK pin
can handle input currents of greater than 100mA above VDD without
latchup.
Note 5: VDD = 5V, VSS = – 5V or 0V, fSAMPLE = 5MHz, tr = tf = 5ns unless
otherwise specified.
IIN
Digital Input Current
VIN = 0V to VDD
●
±10
A
CIN
Digital Input Capacitance
1.8
pF
VOH
High Level Output Voltage
0VDD = 4.75V, IO = –10A
4.74
V
0VDD = 4.75V, IO = –200A
●
4.0
4.71
V
0VDD = 2.7V, IO = –10A
2.6
V
0VDD = 2.7V, IO = –200A
●
2.3
V
VOL
Low Level Output Voltage
0VDD = 4.75V, IO = 160A
0.05
V
0VDD = 4.75V, IO = 1.6mA
●
0.10
0.4
V
0VDD = 2.7V, IO = 160A
0.05
V
0VDD = 2.7V, IO = 1.6mA
●
0.10
0.4
V
ISOURCE
Output Source Current
VOUT = 0V
50
mA
ISINK
Output Sink Current
VOUT = VDD
35
mA
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