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參數(shù)資料
| 型號(hào)： | LTC1421 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | 14-Bit 200KSPS ADC Ser. Out, Auto PWRDN, Single Ended Input 8-SOIC -40 to 85 |
| 中文描述： | 熱插拔控制器 |
| 文件頁數(shù)： | 16/24頁 |
| 文件大小： | 464K |
| 代理商： | LTC1421 |
16
LTC1421/LTC1421-2.5
APPLICATIO
S I
N
FOR
ATIO
U
Board Removal Timing
When the board is removed from the host, the sequence
happens in reverse (Figure 17). Since CON1 and CON2 are
the shortest pins, they break connection first and are
internally pulled high (time point 1). The charge pumps are
turned off, CPON is pulled low. V
OUTLO
and V
OUTHI
are
actively pulled down. When V
OUTLO
falls below its reset
threshold (time point 2) PWRGD is pulled low. To allow
W
U
V
CCLO
1
2
3
4
V
CCHI
DISABLE
CON1
CON2
CPON
PWRGD
V
TH2
1421 F17
V
OUTHI
GATEHI
GATELO
V
OUTLO
RESET
FAULT
POR
32
μ
s
Figure 17. Board Removal Timing
time for power fail information to be stored in nonvolatile
memory, the falling edge of RESET (time point 3) is
delayed by 32
μ
s from the falling edged of PWRGD.
Finally, the input supply pins V
CCHI
and V
CCLO
break
contact (time point 4). If staggered pins are not used, the
board may be powered down prior to removal by switch-
ing the POR pin to ground with a toggle switch.
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| LTC1421CG1 | 制造商:Linear Technology 功能描述: |
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