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參數(shù)資料
| 型號： | LTC1422IS8#TRPBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 電源管理 |
| 英文描述： | Hot Swap Controller; Package: SO; No of Pins: 8; Temperature Range: -40°C to +85°C |
| 中文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8 |
| 封裝： | 0.150 INCH, PLASTIC, SOP-8 |
| 文件頁數(shù)： | 14/16頁 |
| 文件大小： | 193K |
| 代理商： | LTC1422IS8#TRPBF |
7
LTC1422
1422fb
APPLICATIONS INFORMATION
WU
U
Hot Circuit Insertion
When circuit boards are inserted into a live backplane, the
supply bypass capacitors on the board can draw huge
transient currents from the backplane power bus as they
charge up. The transient currents can cause permanent
damage to the connector pins and cause glitches on the
system supply, causing other boards in the system to
reset.
The LTC1422 is designed to turn a board’s supply voltage
on and off in a controlled manner, allowing the board to be
safely inserted or removed from a live backplane. The chip
also provides a system reset signal to indicate when board
supply voltage drops below a programmable voltage.
Power Supply Ramping
The onboard power supply is controlled by placing an
external N-channel pass transistor in the power path
(Figure 1). R1 provides current fault detection and R2
prevents high frequency oscillation. By ramping up the
gate of the pass transistor at a controlled rate, the transient
surge current (I = C dV/dt) drawn from the main backplane
supply can be limited to a safe value when the board makes
connection.
VCC + 10V
VCC
1422 F02
t1
t2
GATE
VOUT
SLOPE = 10
A/C1
Figure 2. Supply Turn-On
Figure 3. Supply Monitor Block Diagram
equal to 10
A/C1 (Figure 2), where C1 is the external
capacitor connected between the GATE pin and GND.
The ramp time for the supply is equal to: t = (VCC C1)/
10
A. After the ON pin has been pulled low for more than
40
s, the GATE is immediately pulled to GND.
Voltage Monitor
The LTC1422 uses a 1.232V bandgap reference, precision
voltage comparator and a resistive divider to monitor the
output supply voltage (Figure 3).
Figure 1. Supply Control Circuitry
+
VCC
SENSE
TIMER
GND
GATE
LTC1422
ON
8
34
76
C1
CLOAD
C2
R3
VOUT
VCC
Q1
R1
5
2
1422F01
1
FB
RESET
R2
10
R4
When power is first applied to the chip, the gate of the
N-channel (Pin 6) is pulled low. After the ON pin is held
high for at least one timing cycle, the charge pump is
turned on. The voltage at GATE begins to rise with a slope
+
SENSE
12
A
R4
R3
7
VCC
VOUT
VCC
8
GATE
LTC1422
6
2
FB
Q2
ON
1422 F03
1
5
C2
34
C1
CLOAD
Q1
R1
LOGIC
TIMER
1.232V
REFERENCE
–
+
COMP 2
P
RESET
R2
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