4
LTC1428-50
TYPICAL PERFORMANCE CHARACTERISTICS
U
W
PIN FUNCTIONS
UU
U
IOUT (Pin 1): DAC Current Sink Output. In 3.3V or 5V
systems, the DAC IOUT pin can be biased from 2V to 10V.
VCC (Pin 2): Voltage Supply (3V ≤ VCC ≤ 6.5V). This supply
must be kept free from noise and ripple by bypassing
directly to a ground plane.
SHDN (Pin 3): Shutdown. A logic low puts the chip
into shutdown mode. The digital setting for the DAC is
retained.
CLK (Pin 4): Shift Clock. This clock synchronizes the serial
data and has a Schmitt trigger input.
CS (Pin 5): Chip Select Input. In 3-wire mode, a logic low
enables the LTC1428-50. Upon power-up, a logic high
puts the chip into pulse mode. If CS ever goes low, the chip
is configured into 3-wire mode until VCC is reset.
GND (Pin 6): Ground. Ground should be tied directly to a
ground plane.
DIN (UP/DN)(Pin 7): Data Input. In 3-wire mode, the DAC
data is shifted into DIN. In pulse mode, upon power-up a
logic high puts the counter into increment-only mode. If
DIN ever goes low, the counter is configured in increment/
decrement mode until VCC is reset.
DOUT (Pin 8): Data Output. In 3-wire mode, on every
conversion DOUT serially outputs the previous 8-bit DAC
data. In pulse mode, DOUT is three-stated.
Temperature Variation
TEMPERATURE (
°C)
–55
FULL-SCALE
OUTPUT
CURRENT
(
A)
50.5
51.5
52.5
65
1428-50 G04
49.5
48.5
47.5
–25
5
35
95
125
155
VCC = 3.3V
V(IOUT) = 2.5V
TEMPERATURE (
°C)
0
ZERO-SCALE
CURRENT
(nA)
2
6
8
10
20
14
20
40
50
1428-50 G06
4
16
18
12
10
30
60
70
VCC = 3.3V
V(IOUT) = 10V
V(IOUT) = 5V
V(IOUT) = 2.5V
Bias Voltage Rejection
IOUT BIAS VOLTAGE (V)
0
FULL-SCALE
OUTPUT
CURRENT
(LSB)
ZERO-SCALE
OUTPUT
CURRENT
(LSB)
–4
–2
0
12
1428-50 G05
–6
–8
48
214
610
16
–10
–12
2
0.03
0.04
0.05
0.02
0.01
0
0.06
VCC = 3.3V
TA = 25°C
Zero-Scale IOUT vs Temperature