APPLICATIONS IN
參數(shù)資料
型號: LTC1440CS8#TRPBF
廠商: Linear Technology
文件頁數(shù): 3/16頁
文件大小: 0K
描述: IC COMP W/REF LP SINGLE 8-SOIC
標準包裝: 2,500
類型: 帶電壓基準
元件數(shù): 1
輸出類型: CMOS,TTL
電壓 - 電源,單路/雙路(±): 2 V ~ 11 V,±1 V ~ 5.5 V
電壓 - 輸入偏移(最小值): 10mV @ 5V
電流 - 輸出(標準): 0.02mA @ 5V
電流 - 靜態(tài)(最大值): 4.4µA
CMRR, PSRR(標準): 80dB CMRR,80dB PSRR
傳輸延遲(最大): 15µs
磁滯: 50mV
工作溫度: 0°C ~ 70°C
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
安裝類型: 表面貼裝
包裝: 帶卷 (TR)
11
LTC1440/LTC1441/LTC1442
144012fd
APPLICATIONS INFORMATION
WU
U
V +
R1
430
R2
10k
C1
1
F
5V
TO
8V
OUT
V
21
7
8
GND
LTC1440
1440/1/2 F03a
IN+
IN
HYST
REF
3
4
5
6
R3
2.4M
+
Figure 3a. Reference Transient Response Test Circuit
2ms/DIV
1440/1/2 F03b
8V
V +
5V
VREF
OUT
Hysteresis
Hysteresis can be added to the LTC1440 by connecting a
resistor (R1) between the REF and HYST pins and a
second resistor (R2) from HYST to V (Figure 4).
The difference between the upper and lower threshold
voltages, or hysteresis voltage band (VHB), is equal to twice
the voltage difference between the REF and HYST pins.
When more hysteresis is added, the upper threshold
increases the same amount as the low threshold de-
creases. The maximum voltage allowed between REF and
HYST pins is 50mV, producing a maximum hysteresis
voltage band of 100mV. The hysteresis band could vary by
2mV/
DIV
up to 15%. If hysteresis is not wanted, the HYST pin
should be shorted to REF. Acceptable values for IREF range
from 0.1
A to 5A. If 2.4M is chosen for R2, then the value
of R1 is equal to the value of VHB.
Figure 5. Glitch-Free Level Detector with Hysteresis
V +
R5
430
5%
R3
15k
1%
C1
1
F
OUT
V
21
7
5V
VIN
8
GND
LTC1440
1440/1/2 F05
IN+
IN
HYST
REF
3
4
5
6
+
R2
3.4M
1%
R1
1.18M
1%
R4
2.4M
1%
6
R2
HYST
V
REF
5
R1
1440/1/2 F04
LTC1440
2
IREF
R1 =
VHB
(2)(IREF)
R2 =
IREF
1.182V –
(
)
VHB
2
Figure 4. Programmable Hysteresis
Level Detector
The LTC1440 is ideal for use as a micropower level
detector as shown in Figure 5. R1 and R2 form a voltage
divider from VIN to the noninverting comparator input. R3
and R4 set the hysteresis voltage, and R5 and C1 bypass
the reference output. The following design procedure can
be used to select the component values:
1. Choose the VIN voltage trip level, in this example 4.65V.
Figure 3b. Reference and Comparator Output
Transient Response
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