參數(shù)資料
型號： LTC1450LCN
廠商： LINEAR TECHNOLOGY CORP
元件分類： DAC
英文描述： Quad, Micropower, Push-Pull Outputs, LinCMOS(TM) Voltage Comparator 14-TSSOP 0 to 70
中文描述： PARALLEL, WORD INPUT LOADING, 14 us SETTLING TIME, 12-BIT DAC, PDIP24
封裝： 0.300 INCH, PLASTIC, DIP-24
文件頁數(shù)： 9/16頁
文件大?。?/td> 325K
代理商： LTC1450LCN
9
LTC1450/LTC1450L
DAC CODE
1450/50L F01
OUTPUT
VOLTAGE
NEGATIVE
OFFSET
0V
Figure 1. Effect of Negative Offset
Integral Nonlinearity (INL):
End-point INL is the maxi-
mum deviation from a straight line passing through the
end points of the DAC transfer curve. Because the part
operates from a single supply and the output cannot go
below zero, the linearity is measured between full scale
and the code corresponding to the maximum offset
specification. The INL error at a given input code is
calculated as follows:
INL
= [V
OUT
– V
OS
– (V
FS
– V
OS
)(code/4095)]/LSB
V
OUT
= The output voltage of the DAC measured at
the given input code
Differential Nonlinearity (DNL):
DNL is the difference
between the measured change and the ideal one LSB
change between any two adjacent codes. The DNL error
between any two codes is calculated as follows:
DNL
= (
V
OUT
– LSB)/LSB
V
OUT
= The measured voltage difference between
two adjacent codes
Digital Feedthrough:
The glitch that appears at the analog
output caused by AC coupling from the digital inputs when
they change state. The area of the glitch is specified in
(nV)
(
s).
Resolution (n):
Resolution is defined as the number of
digital input bits (n). It defines the number of DAC output
states (2
n
) that divide the full-scale range. The resolution
does not imply linearity.
Full-Scale Voltage (V
FS
):
This is the output of the DAC
when all bits are set to 1.
Voltage Offset Error (V
OS
):
The theoretical voltage at the
output when the DAC is loaded with all zeros. The output
amplifier can have a true negative offset, but because the
part is operated from a single supply, the output cannot go
below zero. If the offset is negative, the output will remain
near 0V resulting in the transfer curve shown in Figure 1.
The offset of the part is measured at the code that corre-
sponds to the maximum offset specification:
V
OS
= V
OUT
– [(Code)(V
FS
)/(2
n
– 1)]
Least Significant Bit (LSB):
One LSB is the ideal voltage
difference between two successive codes.
LSB = (V
FS
– V
OS
)/(2
n
– 1) = (V
FS
– V
OS
)/4095
Nominal LSBs:
LTC1450
LSB = 4.095V/4095 = 1mV
LTC1450L
LSB = 2.5V/4095 = 0.610mV
DEFU
U
相關(guān)PDF資料
PDF描述
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