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參數(shù)資料
| 型號(hào)： | LTC1456IN8 |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | DAC |
| 英文描述： | 12-Bit Rail-to-Rail Micropower DAC with Clear Input |
| 中文描述： | SERIAL INPUT LOADING, 14 us SETTLING TIME, 12-BIT DAC, PDIP8 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-8 |
| 文件頁(yè)數(shù)： | 7/8頁(yè) |
| 文件大小： | 148K |
| 代理商： | LTC1456IN8 |
7
LTC1456
OPERATIOU
Serial Interface
The data on the D
IN
input is loaded into the shift register
on the rising edge of the clock. The MSB is loaded first. The
DAC register loads the data from the shift register when
CS/LD is pulled high. The CLK is disabled internally when
CS/LD is high. Note: CLK must be low before CS/LD is
pulled low to avoid an extra internal clock pulse.
When CLR is pulled low it asynchronously resets the shift
and DAC registers to all zeros.
The buffered output of the 12-bit shift register is available
on the D
OUT
pin which swings from GND to V
CC
. Multiple
LTC1456s may be daisy-chained together by connecting
the D
OUT
pin to the D
IN
pin of the next chip, while the CLK
and CS/LD signals remain common to all chips in the daisy
chain. The serial data is clocked to all of the chips, then the
CS/LD signal is pulled high to update all of them simulta-
neously.
Voltage Output
The LTC1456's rail-to-rail buffered output can source or
sink 5mA over the entire operating temperature range
while pulling to within 300mV of the positive supply
voltage or ground. The output swings to within a few
millivolts of either supply rail when unloaded and has an
equivalent output resistance of 40
when driving a load to
the rails. The output can drive 1000pF without going into
oscillation.
CLR
CLK
D
IN
CS/LD
μ
P
0.1
μ
F
V
CC
V
OUT
GND
5V
LTC1456
1456 TA04
–
+
LT1077
V
+ 5V TO 100V
FOR R
L
≤
50
Q1
2N3440
R
A
410
R
L
I
OUT
=
≈
0mA TO 10mA
D
IN
4.095
4096 R
A
TYPICAL APPLICATIO
N
U
The circuit below shows a digitally programmable current
source from an external voltage source using an external
op amp, an LT
1077 and an NPN transistor (2N3440). Any
digital word from 0 to 4095 is loaded into the LTC1456 and
its output correspondingly swings from 0V to 4.095V. In
the configuration shown, this voltage will be forced across
the resistor R
A
. If R
A
is chosen to be 410
the output
current will range from 0mA at zero scale to 10mA at full
scale. The minimum voltage for V
S
is determined by the
load resistor R
L
and Q1’s V
CESAT
voltage. With a load
resistor of 50
, the voltage source can be as low as 5V.
12-Bit 5V Single Supply Voltage Output DAC
D
IN
CLK
CS/LD
D
OUT
μ
P
0.1
μ
F
OUTPUT
0V TO 4.095V
V
CC
V
OUT
GND
LTC1456
CLR
TO NEXT DAC FOR
DAISY-CHAINING
4.5V TO 5.5V
1456 TA03
Digitally Programmable Current Source
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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| LTC1456CN8 | Low-Power LinCMOS(TM) Quad Comparator with Totem Pole Output 14-SOIC -55 to 125 |
| LTC1456CS8 | 12-Bit Rail-to-Rail Micropower DAC with Clear Input |
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