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參數(shù)資料
| 型號： | LTC1484IS8#TR |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 4/16頁 |
| 文件大小： | 0K |
| 描述： | IC TXRX RS485 LP FAILSAFE 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 收發(fā)器 |
| 驅(qū)動(dòng)器/接收器數(shù)： | 1/1 |
| 規(guī)程： | RS422，RS485 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
12
LTC1484
APPLICATIONS INFORMATION
WU
U
Shutdown Mode
The receiver output (RO) and the driver outputs (A, B) can
be three-stated by taking the RE and DE pins high and low
respectively. Taking RE high and DE low at the same time
puts the LTC1484 into shutdown mode and ICC drops to
20
A max.
In some applications (see CDMA), the A and B lines are
pulled to VCC or GND through external resistors to force
the line to a high or low state when all connected drivers
are disabled. In shutdown, the supply current will be
higher than 20
A due to the additional current drawn
through the external pull-up and the 22k input resistance
of the LTC1484.
ESD Protection
The ESD performance of the LTC1484 A and B pins is
characterized to meet
±15kV using the Human Body
Model (100pF, 1.5k
),IEC-1000-4-2level(±8kV)contact
mode and IEC-1000-4-2 level 3 (
±8kV) air discharge
mode.
This means that external voltage suppressors are not
required in many applications when compared with parts
that are only protected to
±2kV. Pins other than the A and
B pins are protected to
±4.5kV typical per the Human Body
Model.
When powered up, the LTC1484 does not latch up or
sustain damage when the A and B pins are tested using any
of the three conditions listed. The data during the ESD
event may be corrupted, but after the event the LTC1484
continues to operate normally. The additional ESD protec-
tion at the A and B pins is important in applications where
these pins are exposed to the external world via connec-
tions to sockets.
Fault Protection
When shorted to –7V or 10V at room temperature, the
short-circuit current in the driver pins is limited by
internal resistance or protection circuitry to 250mA. Over
the industrial temperature range, the absolute maximum
positive voltage at any driver pin should be limited to 10V
to avoid damage to the driver pins. At higher ambient
temperatures, the rise in die temperature due to the
short-circuit current may trip the thermal shutdown
circuit.
When the driver is disabled, the receiver inputs can
withstand the entire – 7V to 12V RS485 common mode
range without damage.
The LTC1484 includes a thermal shutdown circuit which
protects the part against prolonged shorts at the driver
outputs. If a driver output is shorted to another output or
to VCC, the current will be limited to 250mA. If the die
temperature rises above 150
°C, the thermal shutdown
circuit three-states the driver outputs to open the current
path. When the die cools down to about 130
°C, the driver
outputs are taken out of three-state. If the short persists,
the part will heat again and the cycle will repeat. This
thermal oscillation occurs at about 10Hz and protects the
part from excessive power dissipation. The average fault
current drops as the driver cycles between active and
three-state. When the short is removed, the part will return
to normal operation.
Carrier Detect Multiple Access (CDMA) Application
In normal half-duplex RS485 systems, only one node can
transmit at a time. If an idle node suddenly needs to gain
access to the twisted pair while other communications are
in progress, it must wait its turn. This delay is unaccept-
able in safety-related applications. A scheme known as
Carrier Detect Multiple Access (CDMA) solves this prob-
lem by allowing any node to interrupt on-going communi-
cations.
Figure 11 shows four nodes in a typical CDMA communi-
cations system. In the absence of any active drivers, bias
resistors (1.2k) force a “1” across the twisted pair. All
drivers in the system are connected so that when enabled,
they transmit a “0”. This is accomplished by tying DI low
and using DE as the driver data input. A “1” is transmitted
by disabling the driver’s “0” output and allowing the bias
resistors to reestablish a “1” on the twisted pair.
Control over communications is achieved by asserting a
“0” during the time an active transmitter is sending a “1”.
Any node that is transmitting data watches its own
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