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參數(shù)資料
| 型號(hào)： | LTC1522 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | Micropower, Regulated 5V Charge Pump DC/DC Converter |
| 中文描述： | 微功耗，電壓5V充電泵DC / DC轉(zhuǎn)換器 |
| 文件頁(yè)數(shù)： | 5/8頁(yè) |
| 文件大?。?/td> | 223K |
| 代理商： | LTC1522 |
5
LTC1522
APPLICATIO
S I
N
FOR
ATIO
U
A ceramic capacitor is recommended for the flying capaci-
tor with a value in the range of 0.1
μ
F to 0.22
μ
F. Note that
a large value flying cap (>0.22
μ
F) will increase output
ripple unless C
OUT
is also increased. For very low load
applications, C
FLY
may be reduced to 0.01
μ
F to 0.047
μ
F.
This will reduce output ripple at the expense of efficiency
and maximum output current.
W
U
Output Ripple
Normal LTC1522 operation produces voltage ripple on the
V
OUT
pin. Output voltage ripple is required for the LTC1522
to regulate. Low frequency ripple exists due to the hyster-
esis in the sense comparator and propagation delays in the
charge pump enable/disable circuits. High frequency ripple
is also present mainly due to ESR (Equivalent Series
Resistance) in the output capacitor. Typical output ripple
under maximum load is 50mV
P-P
with a low ESR 10
μ
F
output capacitor.
The magnitude of the ripple voltage depends on several
factors. High input voltages (V
IN
> 3.3V) increase the output
ripple since more charge is delivered to C
OUT
per clock
cycle. A large flying capacitor (>0.22
μ
F) also increases
ripple for the same reason. Large output current load and/
or a small output capacitor (<10
μ
F) results in higher ripple
due to higher output voltage dV/dt. High ESR capacitors
(ESR > 0.5
) on the output pin cause high frequency
voltage spikes on V
OUT
with every clock cycle.
There are several ways to reduce the output voltage ripple.
A larger C
OUT
capacitor (22
μ
F or greater) will reduce both
the low and high frequency ripple due to the lower C
OUT
charging and discharging dV/dt and the lower ESR typi-
cally found with higher value (larger case size) capacitors.
A low ESR ceramic output capacitor will minimize the high
frequency ripple, but will not reduce the low frequency
ripple unless a high capacitance value is chosen. A reason-
able compromise is to use a 10
μ
F to 22
μ
F tantalum
capacitor in parallel with a 1
μ
F to 3.3
μ
F ceramic capacitor
on V
OUT
to reduce both the low and high frequency ripple.
An RC filter may also be used to reduce high frequency
voltage spikes (see Figure 1).
V
OUT
5V
LTC1522
V
OUT
3
15
μ
F
TANTALUM
1
μ
F
CERAMIC
V
OUT
5V
+
LTC1522
V
OUT
3
1522 F01
3.9
10
μ
F
TANTALUM
10
μ
F
TANTALUM
+
+
Figure 1. Output Ripple Reduction Techniques
In low load or high V
IN
applications, smaller values for
C
FLY
may be used to reduce output ripple. A smaller flying
capacitor (0.01
μ
F to 0.047
μ
F) delivers less charge per
clock cycle to the output capacitor resulting in lower
output ripple. However, the smaller value flying caps also
reduce the maximum I
OUT
capability as well as efficiency.
Inrush Currents
During normal operation, V
IN
will experience current tran-
sients in the 50mA to 100mA range whenever the charge
pump is enabled. During start-up, these inrush currents
may approach 250mA. For this reason, it is important to
minimize the source resistance between the input supply
and the V
IN
pin. Too much source resistance may result in
regulation problems or even prevent start-up.
Ultralow Quiescent Current (I
Q
= 2.1
μ
A)
Regulated Supply
The LTC1522 contains an internal resistor divider (refer to
the Block Diagram) that draws only 1
μ
OUT
.
During no-load conditions, the internal load causes a
droop rate of only 100mV per second on V
OUT
with
C
OUT
= 10
μ
F. Applying a 2Hz to 100Hz, 95% to 98% duty
cycle signal to the SHDN pin ensures that the circuit of
Figure 2 comes out of shutdown frequently enough to
maintain regulation during no-load or low-load condi-
tions. Since the part spends nearly all of its time in
shutdown, the no-load quiescent current (see Figure 3a) is
approximately equal to (V
OUT
)(1
μ
A)/(V
IN
)(Efficiency).
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