參數(shù)資料
型號(hào): LTC1563C
廠商: Linear Technology Corporation
英文描述: Active RC, 4th Order Lowpass Filter Family
中文描述: 有源RC,四階低通濾波器系列
文件頁數(shù): 8/12頁
文件大?。?/td> 146K
代理商: LTC1563C
8
LTC 1563-2/LTC 1563-3
APPLICATIO
S I
FOR
ATIO
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Capacitive loading on the output reduces the stability of
the op amp. If the capacitive loading is sufficiently high,
the stability margin is decreased to the point of oscillation
at the output. Capacitive loading should be kept below
30pF. Good, tight layout techniques should be maintained
at all times. These parts should not drive long traces and
must never drive a long coaxial cable. When probing the
LTC1563-X, always use a 10x probe. Never use a 1x probe
A standard 10x probe has a capacitance of 10pF to 15pF
while a 1x probe’s capacitance can be as high as 150pF.
The use of a 1x probe will probably cause oscillation.
W
U
U
For larger capacitive loads, a series isolation resistor can
be used between the part and the capacitive load. If the
load is too great, a buffer must be used.
Layout Precautions
The LTC1563-X is an active RC filter. The response of the
filter is determined by the on-chip capacitors and the
external resistors. Any external, stray capacitance in par-
allel with an on-chip capacitor, or to an AC ground, can
alter the transfer function.
Capacitance to an AC ground is the most likely problem.
Capacitance on the LPA or LPB pins does not affect the
transfer function but does affect the stability of the op
amps. Capacitance on the INVA and INVB pins will affect
the transfer function somewhat and will also affect the
stability of the op amps. Capacitance on the SA and SB
pins alters the transfer function of the filter. These pins are
the most sensitive to stray capacitance. Stray capacitance
on these pins results in peaking of the frequency response
near the cutoff frequency. Poor layout can give 0.5dB to
1dB of excess peaking.
To minimize the effects of parasitic layout capacitance, all
of the resistors for section A should be placed as close as
possible to the SA pin. Place the R31 resistor first so that
it is as close as possible to the SA pin on one end and as
close as possible to the INVA pin on the other end. Use the
same strategy for the layout of section B, keeping all of the
resistors as close as possible to the SB node and first
placing R32 between the SB and INVB pins. It is also best
if the signal routing and resistors are on the same layer as
the part without any vias in the signal path.
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