參數(shù)資料
型號: LTC1569-6
廠商: Linear Technology Corporation
英文描述: Linear Phase, DC Accurate, Low Power, 10th Order Lowpass Filter
中文描述: 線性相位,直流精確度,低功耗,第10階低通濾波器
文件頁數(shù): 3/12頁
文件大小: 217K
代理商: LTC1569-6
3
LTC1569-6
The
G
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25
°
C.
V
S
= 3V (V
+
= 3V, V
= 0V), f
CLK
= 4.096MHz, f
CUTOFF
= 64kHz, R
LOAD
= 10k unless otherwise specified.
ELECTRICAL C
HARA TERISTICS
PARAMETER
Output DC Offset
(Note 2)
CONDITIONS
R
EXT
= 10k, Pin 5 Shorted to Pin 7
MIN
TYP
±
2
±
6
±
15
25
25
75
2.7
0.5
4.0
0.5
4.0
0.5
3
MAX
±
5
±
12
UNITS
mV
mV
mV
μ
V/
°
C
μ
V/
°
C
μ
V/
°
C
V
S
= 3V
V
S
= 5V
V
S
=
±
5V
V
S
= 3V
V
S
= 5V
V
S
=
±
5V
Min Logical “1”
Max Logical “0”
Min Logical “1”
Max Logical “0”
Min Logical “1”
Max Logical “0”
V
S
= 3V
Output DC Offset Drift
R
EXT
= 10k, Pin 5 Shorted to Pin 7
Clock Pin Logic Thresholds
when Clocked Externally
V
S
= 3V
V
V
V
V
V
V
V
S
= 5V
V
S
=
±
5V
Power Supply Current
(Note 3)
f
CLK
= 256kHz (40k from Pin 6 to Pin 7,
Pin 5 Open,
÷
4), f
CUTOFF
= 4kHz
4
5
5
6
7
8
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
G
V
S
= 5V
3.5
G
V
S
= 10V
4.5
G
f
CLK
= 4.096MHz (10k from Pin 6 to Pin 7,
Pin 5 Shorted to Pin 4,
÷
1), f
CUTOFF
= 64kHz
V
S
= 3V
8
G
11
V
S
= 5V
9
G
13
V
S
= 10V
12
G
17
Clock Feedthrough
Wideband Noise
THD
Clock-to-Cutoff
Frequency Ratio
Max Clock Frequency
(Note 4)
Pin 5 Open
Noise BW = DC to 2 f
CUTOFF
f
IN
= 3kHz, 1.5V
P-P
, f
CUTOFF
= 32kHz
0.1
95
80
64
mV
RMS
μ
V
RMS
dB
V
S
= 3V
V
S
= 5V
V
S
=
±
5V
V
S
= 3V, 5V, T
A
< 85
°
C
V
S
=
±
5V
Aliased Components <–65dB
5
5
7
MHz
MHz
MHz
kHz
kHz
Hz
Min Clock Frequency
(Note 5)
Input Frequency Range
1.5
3
0.9 f
CLK
Note 1:
Absolute maximum ratings are those values beyond which the life
of a device may be impaired.
Note 2:
DC offset is measured with respect to Pin 3.
Note 3:
If the internal oscillator is used as the clock source and the divide-
by-4 or divide-by-16 mode is enabled, the supply current is reduced as
much as 40% relative to the divide-by-1 mode.
Note 4:
The maximum clock frequency is arbitrarily defined as the
frequency at which the filter AC response exhibits >1dB of gain peaking.
Note 5:
The minimum clock frequency is arbitrarily defined as the frequecy
at which the filter DC offset changes by more than 5mV.
Note 6:
For more details refer to the Input and Output Voltage Range
paragraph in the Applications Information section.
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