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參數(shù)資料
| 型號(hào)： | LTC1595AIN8 |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | DAC |
| 英文描述： | Serial 16-Bit Multiplying DACs |
| 中文描述： | SERIAL INPUT LOADING, 1 us SETTLING TIME, 16-BIT DAC, PDIP8 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-8 |
| 文件頁(yè)數(shù)： | 10/12頁(yè) |
| 文件大小： | 299K |
| 代理商： | LTC1595AIN8 |
10
LTC1595/LTC1596/LTC1596-1
Bipolar (4-Quadrant Multiplying) Mode
(V
OUT
= –V
REF
to V
REF
)
The LTC1595/LTC1596 can be used with a dual op amp
and three external resistors to provide 4-quadrant multi-
plying operation as shown in Figure 2 (last page). With a
fixed 10V reference, the circuits shown give a precision
bipolar –10V to 10V output swing. Using the LTC1596-1
will cause the power-on reset and clear pin to reset the DAC
to midscale (bipolar zero).
Op Amp Selection
Because of the extremely high accuracy of the 16-bit
LTC1595/LTC1596, thought should be given to op amp
selection in order to achieve the exceptional performance
of which the part is capable. Fortunately, the sensitivity of
INL and DNL to op amp offset has been greatly reduced
compared to previous generations of multiplying DACs.
Op amp offset will contribute mostly to output offset and
gain and will have minimal effect on INL and DNL. For
example, a 500
μ
V op amp offset will cause about 0.55LSB
APPLICATIO
S I
N
FOR
ATIO
U
W
U
INL degradation and 0.15LSB DNL degradation with a 10V
full-scale range. The main effects of op amp offset will be
a degradation of zero-scale error equal to the op amp
offset, and a degradation of full-scale error equal to twice
the op amp offset. For example, the same 500
μ
V op amp
offset will cause a 3.3LSB zero-scale error and a 6.5LSB
full-scale error with a 10V full-scale range.
Op amp input bias current (I
BIAS
) contributes only a zero-
scale error equal to I
BIAS
(R
FB
) = I
BIAS
(R
REF
) = I
BIAS
(7k).
Table 2 shows a selection of LTC op amps which are
suitable for use with the LTC1595/LTC1596. For a thor-
ough discussion of 16-bit DAC settling time and op amp
selection, refer to Application Note 74, “Component and
Measurement Advances Ensure 16-Bit DAC Settling Time.”
Grounding
As with any high resolution converter, clean grounding is
important. A low impedance analog ground plane and star
grounding should be used. I
OUT2
(LTC1596) and GND
(LTC1595) must be tied to the star ground with as low a
resistance as possible.
Table 2. 16-Bit Settling Time for Various Amplifiers Driven by the LT1595 DAC. LT1468 (Shaded) Offers Fastest Settling Time While
Maintaining Accuracy Over Temperature
CONSERVATIVE SETTLING TIME
AMPLIFIER
AND COMPENSATION VALUE
LT1001
120
μ
s
100pF
LT1007
19
μ
s
100pF
LT1013
75
μ
s
150pF
LT1077
200
μ
s
100pF
LT1097
120
μ
s
75pF
LT1112
120
μ
s
100pF
LT1178
450
μ
s
100pF
LT1468
2.5
μ
s
30pF
COMMENTS
Good Low Speed Choice
I
B
Gives
≈
1LSB Error at 25
°
C
≈
1LSB Error Due to V
OS
over Temperature
Good Low Speed Choice
Good Low Speed Choice Dual
Low Power Dual
Fastest Settling with 16-Bit Performance
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LTC1595AIS8 | JT 55C 55#20 PIN PLUG |
| LTC1595BIN8 | Serial 16-Bit Multiplying DACs |
| LTC1595BCN8 | Serial 16-Bit Multiplying DACs |
| LTC1595CCS8 | Serial 16-Bit Multiplying DACs |
| LTC1596-1ACN | Serial 16-Bit Multiplying DACs |
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