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參數(shù)資料
| 型號(hào)： | LTC1598L |
| 廠商： | Linear Technology Corporation |
| 元件分類： | 串行ADC |
| 英文描述： | 4- and 8-Channel, 3V Micropower Sampling 12-Bit Serial I/O A/D Converters |
| 中文描述： | 4 -和8通道，3V的微取樣12位串行I /辦公自動(dòng)化/ D轉(zhuǎn)換器 |
| 文件頁數(shù)： | 7/24頁 |
| 文件大?。?/td> | 278K |
| 代理商： | LTC1598L |
7
LTC1594L/LTC1598L
PI
FU
CTIO
N
S
U
U
LTC1594L
CH0 (Pin 1):
Analog Multiplexer Input.
CH1 (Pin 2):
Analog Multiplexer Input.
CH2 (Pin 3):
Analog Multiplexer Input.
CH3 (Pin 4):
Analog Multiplexer Input.
ADCIN (Pin 5):
ADC Input. This input is the positive analog
input to the ADC. Connect this pin to MUXOUT for normal
operation.
V
REF
(Pin 6):
Reference Input. The reference input defines
the span of the ADC.
COM (Pin 7):
Negative Analog Input. This input is the
negative analog input to the ADC and must be free of noise
with respect to GND.
GND (Pin 8):
Analog Ground. GND should be tied directly
to an analog ground plane.
CSADC (Pin 9):
ADC Chip Select Input. A logic high on this
input powers down the ADC and three-states D
OUT
. A logic
low on this input enables the ADC to sample the selected
channel and start the conversion. For normal operation,
drive this pin in parallel with CSMUX.
LTC1598L
CH5 (Pin 1):
Analog Multiplexer Input.
CH6 (Pin 2):
Analog Multiplexer Input.
CH7 (Pin 3):
Analog Multiplexer Input.
GND (Pin 4):
Analog Ground. GND should be tied directly
to an analog ground plane.
CLK (Pin 5):
Shift Clock. This clock synchronizes the serial
data transfer to both MUX and ADC. It also determines the
conversion speed of the ADC.
CSMUX (Pin 6):
MUX Chip Select Input. A logic high on
this input allows the MUX to receive a channel address. A
logic low enables the selected MUX channel and connects
it to the MUXOUT pin for A/D conversion. For normal
operation, drive this pin in parallel with CSADC.
D
IN
(Pin 7):
Digital Data Input. The multiplexer address is
shifted into this input.
D
OUT
(Pin 10):
Digital Data Output. The A/D conversion
result is shifted out of this output.
V
CC
(Pin 11):
Power Supply Voltage. This pin provides
power to the ADC. It must be bypassed directly to the
analog ground plane.
CLK (Pin 12):
Shift Clock. This clock synchronizes the
serial data transfer to both MUX and ADC.
CSMUX (Pin 13):
MUX Chip Select Input. A logic high on
this input allows the MUX to receive a channel address. A
logic low enables the selected MUX channel and connects
it to the MUXOUT pin for A/D conversion. For normal
operation, drive this pin in parallel with CSADC.
D
IN
(Pin 14):
Digital Data Input. The multiplexer address
is shifted into this input.
MUXOUT (Pin 15):
MUX Output. This pin is the output of
the multiplexer. Tie to ADCIN for normal operation.
V
CC
(Pin 16):
Power Supply Voltage. This pin should be
tied to Pin 11.
COM (Pin 8):
Negative Analog Input. This input is the
negative analog input to the ADC and must be free of noise
with respect to GND.
GND (Pin 9):
Analog Ground. GND should be tied directly
to an analog ground plane.
CSADC (Pin 10):
ADC Chip Select Input. A logic high on
this input deselects and powers down the ADC and three-
states D
OUT
. A logic low on this input enables the ADC to
sample the selected channel and start the conversion. For
normal operation drive this pin in parallel with CSMUX.
D
OUT
(Pin 11):
Digital Data Output. The A/D conversion
result is shifted out of this output.
NC (Pin 12):
No Connection.
NC (Pin 13):
No Connection.
CLK (Pin 14):
Shift Clock. This input should be tied to Pin 5.
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| LTC1598LCG | Replaced by ADS7961 : 8-Bit, 76 kSPS ADC Serial Out, On-Chip 20 Ch. Analog Mux, 19 Ch. 28-PLCC |
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| LTC1594 | 8-Bit, 40 kSPS ADC Serial-Out, On-Chip 12-Ch. Analog Mux, 11 Ch. 20-SOIC |
| LTC1598IG | 4- and 8-Channel, Micropower Sampling 12-Bit Serial I/O A/D Converters |
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