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參數(shù)資料
| 型號： | LTC1605ACSW |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 16-Bit, 100ksps, Sampling ADC |
| 中文描述： | 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | 0.300 INCH, PLASTIC, SO-28 |
| 文件頁數(shù)： | 4/16頁 |
| 文件大小： | 490K |
| 代理商： | LTC1605ACSW |
4
LTC1605
DIGITAL I
N
PUTS A
N
D DIGITAL OUTPUTS
(Note 5)
LTC1605/LTC1605A
TYP
SYMBOL
I
OZ
C
OZ
I
SOURCE
I
SINK
TI
I
N
G
W
PARAMETER
Hi-Z Output Leakage D15 to D0
Hi-Z Output Capacitance D15 to D0
Output Source Current
Output Sink Current
CONDITIONS
V
OUT
= 0V to V
DD
, CS High
CS High (Note 9)
V
OUT
= 0V
V
OUT
= V
DD
MIN
MAX
±
10
15
UNITS
G
μ
A
pF
mA
mA
G
–10
10
(Note 5)
LTC1605/LTC1605A
TYP
SYMBOL
f
SAMPLE(MAX)
t
CONV
t
ACQ
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
11
t
12
POWER REQUIRE
E
N
TS
PARAMETER
Maximum Sampling Frequency
Conversion Time
Acquisition Time
Convert Pulse Width
Data Valid Delay After R/C
↓
BUSY Delay from R/C
↓
BUSY Low
BUSY Delay After End of Conversion
Aperture Delay
Bus Relinquish Time
BUSY Delay After Data Valid
Previous Data Valid After R/C
↓
R/C to CS Setup Time
Time Between Conversions
Bus Access and Byte Delay
CONDITIONS
MIN
100
MAX
UNITS
kHz
G
G
8
2
μ
s
μ
s
ns
μ
s
ns
μ
s
ns
ns
ns
ns
μ
s
ns
μ
s
ns
G
(Note 11)
(Note 9)
C
L
= 50pF
G
40
G
8
G
65
8
220
40
35
200
7.4
G
10
50
83
G
(Notes 9, 10)
10
10
10
(Notes 9, 10)
83
W
(Note 5)
LTC1605/LTC1605A
TYP
SYMBOL
V
DD
I
DD
P
DIS
PARAMETER
Positive Supply Voltage
Positive Supply Current
Power Dissipation
CONDITIONS
(Notes 9, 10)
MIN
4.75
MAX
5.25
16
80
UNITS
V
G
11
55
mA
mW
The
G
indicates specifications which apply over the full operating
temperature range; all other limits and typicals T
A
= 25
°
C.
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
All voltage values are with respect to ground with DGND, AGND1
and AGND2 wired together (unless otherwise noted).
Note 3:
When these pin voltages are taken below ground or above V
ANA
=
V
DIG
= V
DD
, they will be clamped by internal diodes. This product can
handle input currents of greater than 100mA below ground or above V
DD
without latch-up.
Note 4:
When these pin voltages are taken below ground, they will be
clamped by internal diodes. This product can handle input currents of
90mA below ground without latchup. These pins are not clamped to V
DD
.
Note 5:
V
DD
= 5V, f
SAMPLE
= 100kHz, t
r
= t
f
= 5ns unless otherwise
specified.
Note 6:
Linearity, offset and full-scale specifications apply for a V
IN
input
with respect to ground.
Note 7:
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual end points of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 8:
Bipolar offset is the offset voltage measured from –0.5 LSB when
the output code flickers between 0000 0000 0000 0000 and 1111 1111
1111 1111.
Note 9:
Guaranteed by design, not subject to test.
Note 10:
Recommended operating conditions.
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