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參數(shù)資料
| 型號(hào)： | LTC1623I |
| 廠商： | Linear Technology Corporation |
| 英文描述： | SMBus Dual High Side Switch Controller |
| 中文描述： | 的SMBus雙高端開(kāi)關(guān)控制器 |
| 文件頁(yè)數(shù)： | 3/12頁(yè) |
| 文件大?。?/td> | 144K |
| 代理商： | LTC1623I |
3
LTC 1623
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
T
A
= 25
°
C, V
CC
= 5V unless otherwise specified. C
GA
= 1000pF, C
GB
= 1000pF
PI
FU
CTIO
N
S
U
U
DATA: (Pin 1)
Open-Drain Connected Serial Data Inter-
face. Must be pulled high to V
CC
with external resistor. The
pull-up current must be limited to 350
μ
A.
CLK: (Pin 2)
Serial Clock Interface. Must be pulled high to
V
CC
with external resistor. The pull-up current must be
limited to 350
μ
A.
AD0: (Pin 3)
Lower Three-State Programmable Address
Pin. Must be connected directly to V
CC
, GND, or V
CC
/2
(using two resistors
≤
1M). Do not float this pin.
GND: (Pin 4)
Ground.
AD1: (Pin 5)
Higher Three-State Programmable Address
Pin. Must be connected directly to V
CC
, GND, or V
CC
/2
(using two resistors
≤
1M). Do not float this pin.
GB: (Pin 6)
Gate Drive to External High-Side Switch. Fully
enhanced by internal charge pump. Controlled by 2nd
LSB of command byte.
GA: (Pin 7)
Gate Drive to External High-Side Switch. Fully
enhanced by internal charge pump. Controlled by LSB of
command byte.
V
CC
: (Pin 8)
Input Supply Voltage. Range from 2.7V to
5.5V.
V
IL
V
IH
V
OL
C
IN
AD0 and AD1 Input Low Voltage
AD0 and AD1 Input High Voltage
Data Output Low Voltage
Input Capacitance
(DATA, CLK, AD0, AD1)
Input Leakage Current (DATA, CLK)
Input Leakage Current(AD0, AD1)
SMBus Related Specs (Note 6)
f
SMB
SMBus Operating Frequency
t
SUSTA
Start Condition Setup Time
t
BUF
Bus Free Time Between Stop and Start
t
HDSTA
Start Condition Hold Time
t
SUSTP
Stop Condition Setup Time
t
HDDAT
Data Hold Time
t
SUDAT
Data Setup Time
t
LOW
Clock Low Period
t
HIGH
Clock High Period
t
f
Clock /Data Fall Time
t
r
Clock/Data Rise Time
I
PULLUP
Current Through External Pull-Up
Resistor on DATA Pin
V
CC
= 2.7V to 5.5V
V
CC
= 2.7V to 5.5V
V
CC
= 2.7 to 5.5V, I
PULLUP
= 350
μ
A
G
0.2
V
V
V
G
V
CC
– 0.2
G
0.22
5
0.4
pF
I
IN
±
1
±
250
μ
A
nA
10
4.7
4.7
4.0
4.0
300
250
4.7
4.0
100
kHz
μ
s
μ
s
μ
s
μ
s
ns
ns
μ
s
μ
s
ns
ns
μ
A
50
300
1000
350
(Data Pull-Down Current Capacity)
V
CC
= 2.7V to 5.5V
100
Note 4:
ON is enabled upon receiving the Stop condition from the SMBus
master.
Note 5:
OFF is enabled upon receiving the Stop condition from the SMBus
master.
Note 6:
SMBus timing specs are guaranteed but not tested.
The
G
denotes the specifications which apply over the full operating
temperature range.
Note 1:
Approximately 3% hysteresis is provided to ensure stable
operation and eliminate false triggering by minor V
CC
glitches.
Note 2:
Measured from V
CC
> V
UVLO
to SMBus ready for data input.
Note 3:
The oscillator frequency is not tested directly but is inferred from
turn-on time.
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