參數(shù)資料
型號: LTC1626CS
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: LinCMOS(TM) Timer 8-PDIP
中文描述: 1.6 A SWITCHING REGULATOR, PDSO14
封裝: 0.150 INCH, PLASTIC, SO-14
文件頁數(shù): 9/12頁
文件大?。?/td> 280K
代理商: LTC1626CS
9
LTC1626
Thermal Considerations
In a majority of applications, the LTC1626 does not
dissipate much heat due to its high efficiency. However, in
applications where the switching regulator is running at
high duty cycles or the part is in dropout with the switch
turned on continuously (DC), some thermal analysis is
required. The goal of the thermal analysis is to determine
whether the power dissipated by the regulator exceeds the
maximum junction temperature. The temperature rise is
given by:
T
RISE
= P
D
θ
JA
where P
D
is the power dissipated by the regulator and
θ
JA
is the thermal resistance from the junction of the die to the
ambient temperature.
The junction temperature is given by:
T
J
= T
RISE
+ T
AMBIENT
As an example, consider the case when the LTC1626 is in
dropout at an input voltage of 3V with a load current of
0.5A. From the Typical Performance Characteristics graph
of Switch Resistance, the ON resistance of the P-channel
switch is 0.45
. Therefore, power dissipated by the
part is:
P
D
= I
2
R
DS(ON)
= 113mW
The SO package junction-to-ambient thermal resistance
θ
JA
is 110
°
C/W. Therefore, the junction temperature of the
APPLICATIO
S I
FOR
ATIO
U
W
U
U
regulator when it is operating in a 25
°
C ambient tempera-
ture is:
T
J
= (0.113 110) + 25 = 38
°
C
Remembering that the above junction temperature is
obtained from an R
DS(ON)
at 25
°
C, we might recalculate
the junction temperature based on a higher R
DS(ON)
since
it increases with temperature. However, we can safely
assume that the actual junction temperature will not
exceed the absolute maximum junction temperature
of 125
°
C.
Board Layout Considerations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1626. These items are also illustrated graphically in
the layout diagram of Figure 6. Check the following in your
layout:
1. Are the signal and power grounds separated The
LTC1626 signal ground (Pin 11) must return to the
(–) plate of C
OUT
. The power ground (Pin 12) returns
to the anode of the Schottky diode and the (–) plate
of C
IN
.
2. Does the (+) plate of C
IN
connect to the power V
IN
(Pins
1, 13) as close as possible This capacitor provides the
AC current to the internal P-channel MOSFET and its
driver.
Figure 6. LTC1626 Layout Diagram (See Board Layout Checklist)
+
+
1
2
13
PWR V
IN
C
IN
C
OUT
R
SENSE
V
OUT
1626 F06
V
IN
BOLD LINES INDICATE
HIGH CURRENT PATHS
D1
0.1
μ
F
L
R1
1k
C
T
1000pF
3900pF
R2
V
IN
SW
LTC1626
PWR V
IN
PGND
SGND
SHDN
V
FB
SENSE
+
SHUTDOWN
LBO
LBI
C
T
I
TH
SENSE
3
4
5
6
7
14
12
11
10
9
8
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