參數(shù)資料
型號(hào): LTC1642CGN
廠商: LINEAR TECHNOLOGY CORP
元件分類: 電源管理
英文描述: Hot Swap Controller
中文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO16
封裝: 0.150 INCH, PLASTIC, SSOP-16
文件頁(yè)數(shù): 4/12頁(yè)
文件大?。?/td> 147K
代理商: LTC1642CGN
4
LTC 1642
ON (Pin 4):
Control. When ON is low the GATE pin is
grounded and FAULT goes high. The GATE pin voltage
starts ramping up one RST TMR timing cycle after ON
goes high. Pulsing the ON pin low for at least 2
μ
s also
resets the chip when it latches off after a sustained
overvoltage or current limit. The threshold on a low to high
transition is 1.34V with 110mV of hysteresis.
RESET (Pin 5):
Open Drain Output. RESET is pulled low if
the voltage at the FB pin is below its trip point and goes
high one timing cycle after the FB voltage exceeds its trip
point plus 3mV of hysteresis. RESET has a weak pull-up to
one diode drop below V
CC
; an external resistor can pull the
pin above V
CC
.
FAULT (Pin 6):
Open Drain Output. FAULT is pulled low
when the part latches itself off following a sustained
overvoltage or current limit. It goes high 2
μ
s after the ON
pin goes low. FAULT has a weak pull-up to one diode drop
below V
CC
; an external resistor can pull the pin above V
CC
.
FB (Pin 7):
Noninverting Input to An Analog Comparator;
the inverting input is tied to the 1.23V internal reference.
The FB comparator can be used with an external resistive
divider to monitor the output supply voltage. When the FB
voltage is lower than 1.23V the RESET pin is pulled low.
RESET goes high one system timing cycle after the voltage
at FB exceeds its threshold by 3mV of hysteresis. A low
pass filter at the comparator’s output prevents negative
voltage glitches from triggering a false reset.
GND (Pin 8):
Chip Ground.
OV (Pin 9):
Analog Input Used to Monitor Overvoltages.
When the voltage on OV exceeds its trip point the GATE pin
is pulled low immediately and the CRWBR timer starts. If
OV remains above its trip point (minus 3mV of hysteresis)
long enough for CRWBR to reach its trip point the part
latches off until reset by pulsing the ON pin low; otherwise,
the GATE pin begins ramping up one RST TMR timing
cycle after OV goes below its trip point.
COMPOUT (Pin 10):
Uncommitted Comparator’s Open
Drain Output.
COMP
+
(Pin 11):
Uncommitted Comparator’s Noninvert-
ing Input.
COMP
(Pin 12):
Uncommitted Comparator’s Inverting
Input.
REF (Pin 13):
The Reference Voltage Output, 1.232V
±
2%. To ensure stability the pin should be bypassed with
a 0.1
μ
F compensation capacitor. For V
CC
= 5V it can
source 1mA.
GATE (Pin 14):
High Side Gate Drive for the External
N-Channel. An internal charge pump provides at least 4.5V
of gate drive, but can only source 25
μ
A. The pin requires
an external series RC network to ground to compensate
the current limit loop, and to limit the maximum voltage
ramp which is dV/dt (V/s) = 25/C(
μ
F). GATE is immediately
pulled to ground when the overvoltage comparator trips or
the input supply is below the undervoltage lockout trip
point. During current limit the GATE voltage is adjusted to
maintain constant load current until the BRK TMR pin
trips, when the pin is pulled to ground until the chip is
reset.
SENSE (Pin 15):
Current Limit Set. To use the current limit
place a sense resistor in the supply path between V
CC
and
SENSE. Should the drop across the resistor exceed a
threshold voltage the GATE pin is adjusted to maintain a
constant load current and the timer at the BRK TMR pin is
started. To protect the external FET from thermal damage
the circuit breaker trips after the BRK TMR timing cycle. A
foldback feature makes the current limit decrease as the
voltage at FB approaches ground. Figure 3 quantifies the
relationship. To disable the current limit short SENSE to
V
CC
.
V
CC
(Pin 16):
Positive Supply Voltage; between 2.97V and
16.5V in normal operation. An internal undervoltage lock-
out circuit holds the GATE pin at ground until V
CC
exceeds
2.73V. If V
CC
exceeds 16.5V an internal shunt regulator
protects the chip from V
CC
and SENSE pin voltages up to
33V. When the internal shunt regulator is active and the
charge pump is on the GATE pin voltage will usually be low
but this is not guaranteed; use the OV pin to ensure that the
pass device is off. The V
CC
pin also provides a Kelvin
connection to the high side of the SENSE resistor.
PI FU CTIO S
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