參數(shù)資料
型號: LTC1644CGN#TRPBF
廠商: Linear Technology
文件頁數(shù): 18/24頁
文件大小: 447K
描述: IC CONTROLLER HOT SWAP 20-SSOP
標(biāo)準(zhǔn)包裝: 2,500
類型: 熱交換控制器
應(yīng)用: CompactPCI?
內(nèi)部開關(guān):
電源電壓: 3.3V,5V,±12V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 20-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 20-SSOP
包裝: 帶卷 (TR)
LTC1644
18
1644f
APPLICATIO  S I FOR  ATIO
U
U
U
OFF/ON
5V
IN
5V
IN
5
13
LTC1644*
1644 F10
R13
10& 5%
R14
10& 5%
I/O
I/O
PCI
BRIDGE
CHIP
UP TO 128 I/O LINES
DATA BUS
3V
IN
GND    PRECHARGE
12
DRIVE
11
Q1
MMBT2222A
8
R11
10k
5%
R12
10k
5%
PRECHARGE OUT
1V ?0%
I
OUT
 = ?5mA
R10
18& 5%
Q2
MMBT3906
R24
75k
5%
R19
1k 5%
R20
1.2k
5%
R22 2.74&
R23
51k 5%
R8
1k 5%
R7
12& 5%
C3 4.7nF
R9
24&
Z4: 1PMT5.0AT3
*ADDITIONAL PINS OMITTED FOR CLARITY
PCB EDGE
BACKPLANE
CONNECTOR
BACKPLANE
CONNECTOR
5V
LONG 5V
BD_SEL#
GROUND
I/O PIN 1
I/O PIN 128
Z4
C7
0.01礔
C9 0.1礔
PER 10
POWER PINS
BUS SWITCH
OE
Figure 10. Precharge Circuit with Bus Switch
MMBT2222A
C3 4.7nF
R9
18&
R10A
R10B
R8
1k
R7
12&
3V
IN
PRECHARGE OUT
1644 F08
GND
PRECHARGE  DRIVE
LTC1644*
8
12
11
*ADDITIONAL DETAILS OMITTED FOR CLARITY
V
PRECHARGE
 =
" 1V
R10A
R10A + R10B
Figure 8. Precharge Voltage <1V Application Circuit
Figure 9. Precharge Voltage >1V Application Circuit
MMBT2222A
C3 4.7nF
R9
18&
R10A
R10B
R8
1k
R7
12&
3V
IN
PRECHARGE OUT
1644 F09
GND  PRECHARGE
DRIVE
LTC1644*
8
12
11
*ADDITIONAL DETAILS OMITTED FOR CLARITY
V
PRECHARGE
 =
" 1V
R10A + R10B
R10A
(3) the gate-source (V
GS
) voltage drive for the specified
R
DS(ON)
. Power MOSFET power dissipation is dependent
on four parameters: current delivered to the load, I
LOAD
;
device R
DS(ON)
; device thermal resistance, junction-to-
ambient, ?/DIV>
JA
; and the maximum ambient temperature to
which the circuit will be exposed, T
A(MAX)
. All four of these
parameters determine the junction temperature of the
MOSFET. For reliable circuit operation, the maximum
junction temperature (T
J(MAX)
) for a power MOSFET should
not exceed the manufacturers recommended value. For a
given set of conditions, the junction temperature of a
power MOSFET is given by Equation 9:
MOSFET Junction Temperature,
(9)
T
J(MAX)
 d T
A(MAX)
 + ?/DIV>
JA
 " P
D
where P
D
 = I
LOAD
 " R
DS(ON)
PCB layout techniques for optimal thermal management
of power MOSFET power dissipation help to keep device
?/DIV>
JA
 as low as possible. See PCB Layout Considerations
section for more information.
The R
DS(ON)
 of the external pass transistor should be low
to make its drain-source voltage (V
DS
) a small percentage
of 3V
IN
 or 5V
IN
. For example, at 3V
IN
 = 3.3V, V
DS
 + V
CB
 =
0.1V yields a 3% error at maximum load current. This
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