參數(shù)資料
型號(hào)： LTC1646IGN#TR
廠(chǎng)商： Linear Technology
文件頁(yè)數(shù)： 7/20頁(yè)
文件大?。?/td> 407K
描述： IC CNTRLR HOTSWAP PCIDUAL 16SSOP
標(biāo)準(zhǔn)包裝： 2,500
類(lèi)型： 熱交換控制器
應(yīng)用： CompactPCI?
內(nèi)部開(kāi)關(guān)： 無(wú)
電源電壓： 3.3V，5V
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 16-SSOP（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 16-SSOP
包裝： 帶卷 (TR)
其它名稱(chēng)： LTC1646IGNTR
LTC1646
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PI FU CTIO S
3V
SENSE
 (Pin 9): 3.3V Current Limit Set. With a sense
resistor placed in the supply path between 3V
IN
  and
3V
SENSE
, the GATE pin voltage will be adjusted to maintain
a constant voltage across the sense resistor and a con-
stant current through the switch while the TIMER pin
voltage is less than 1.25V. A foldback feature makes the
current limit decrease as the voltage at the 3V
OUT
 pin
approaches GND.
When the TIMER pin voltage exceeds 1.25V, the circuit
breaker function is enabled. If the voltage across the sense
resistor exceeds 56mV, the circuit breaker is tripped after
a 21祍 time delay. In the event the sense resistor voltage
exceeds 150mV, the circuit breaker trips immediately and
the chip latches off. To disable the 3.3V current limit,
3V
SENSE
 and 3V
IN
 can be shorted together.
GATE (Pin 10): High Side Gate Drive for the External 3.3V
and 5V N-Channel pass transistors. Requires an external
series RC network for the current limit loop compensation
and setting the minimum ramp-up rate. During power-up,
the slope of the voltage rise at the GATE is set by the 13礎(chǔ)
current source connected to the internal charge pump and
the external capacitor connected to GND or by the 3.3V or
5V current limit and the bulk capacitance on the 3V
OUT
 or
5V
OUT
 supply lines. During power-down, the slope of the
ramp down voltage is set by the 200礎(chǔ) current source
connected to GND and the external GATE capacitor.
The voltage at the GATE pin will be modulated to maintain
a constant current when either the 3V or 5V supplies go
into current limit while the TIMER pin voltage is less than
1.25V. If a current fault occurs after the TIMER pin voltage
exceeds 1.25V, the GATE pin is immediately pulled to
GND.
5V
SENSE
 (Pin 11): 5V Current Limit Set. With a sense
resistor placed in the supply path between 5V
IN
  and
5V
SENSE
, the GATE pin voltage will be adjusted to maintain
a constant voltage across the sense resistor and a con-
stant current through the switch while the TIMER pin
voltage is less than 1.25V. A foldback feature makes the
current limit decrease as the voltage at the 5V
OUT
 pin
approaches GND.
When the TIMER pin voltage is greater than 1.25V, the
circuit breaker function is enabled. If the voltage across
the sense resistor exceeds 56mV but is less than 150mV,
the circuit breaker is tripped after a 21祍 time delay. In the
event the sense resistor voltage exceeds 150mV, the
circuit breaker trips immediately and the chip latches off.
To disable the 5V current limit, short 5V
SENSE
 and 5V
IN
together.
5V
IN
 (Pin 12): 5V Supply Sense Input. An undervoltage
lockout circuit prevents the GATE pin voltage from
ramping up when the voltage at the 5V
IN
 pin is less than
2.5V. If no 5V input supply is available, tie the 5V
IN
 pin to
the 3V
IN
 pin.
PRECHARGE (Pin 13): Precharge Monitor Input. An on-
chip error amplifier with a 1V reference servos the DRIVE
pin voltage to keep the precharge node at 1V. If the
precharge function is not being used, tie the PRECHARGE
pin to GND.
DRIVE (Pin 14): Precharge Base Drive Output. Provides
base drive for an external NPN emitter-follower which in
turn biases the PRECHARGE node. If the precharge func-
tion is not being used, allow the DRIVE pin to float.
OFF/ON (Pin 15): Digital Input. Connect the CPCI BD_SEL#
signal to the OFF/ON pin. When the OFF/ON pin is pulled
low, the GATE pin is pulled high by a 13礎(chǔ) current source.
When the OFF/ON pin is pulled high the GATE pin will be
pulled to ground by a 200礎(chǔ) current source.
The OFF/ON pin is also used to reset the electronic circuit
breaker. If the OFF/ON pin is cycled high and low following
the trip of the circuit breaker, the circuit breaker is reset,
and a normal power-up sequence will occur.
RESETIN (Pin 16):  Digital  Input.  Connect  the  CPCI
PCI_RST# signal to the RESETIN pin. Pulling RESETIN low
will cause the RESETOUT pin to pull low.
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