DEFINITIONS UU Resolutio" />
參數(shù)資料
型號: LTC1650AIN
廠商: Linear Technology
文件頁數(shù): 11/12頁
文件大?。?/td> 0K
描述: IC D/A CONV 16BIT R-R 16-DIP
標(biāo)準(zhǔn)包裝: 25
設(shè)置時(shí)間: 4µs
位數(shù): 16
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 雙 ±
功率耗散(最大): 50mW
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 16-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 16-PDIP
包裝: 管件
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): *
8
LTC1650
DEFINITIONS
UU
Resolution (n)
Resolution is defined as the number of digital input bits,
n. It defines the number of DAC output states (2n) that
divide the full-scale range. The resolution does not imply
linearity.
Full-Scale Voltage (VFS)
This is the output of the DAC when all bits are set to 1. The
output will swing from REFLO to REFHI in unipolar mode
and from (2 REFLO – REFHI) to REFHI when in bipolar
mode.
Voltage Offset Error (VOS)
This is the voltage at the output when the DAC is loaded
with all zeros.
Least Significant Bit (LSB)
One LSB is the ideal voltage difference between two
successive codes.
LSB = (VFS – VOS)/(2n – 1) = (VFS – VOS)/65535
Integral Nonlinearity (INL)
Endpoint INL is the maximum deviation from a straight
line passing through the endpoints of the DAC transfer
curve. It is measured after adjusting out gain and offset
error for the DAC.
Differential Nonlinearity (DNL)
DNL is the difference between the measured change and
the ideal 1LSB change between any two adjacent codes.
The DNL error between any two codes is calculated as
follows:
DNL = (
VOUT – LSB)/LSB
VOUT = The measured voltage difference between two
adjacent codes.
Gain Error (GE)
Gain error is the difference between the full-scale output of
a DAC from its ideal full-scale value after offset error has
been adjusted for.
Bipolar Zero Error
When configured for bipolar output and with REFLO tied
to 0V, the LTC1650 output should be 0V with (100…00)
loaded in. Any deviation from 0V at this code is called
bipolar zero error.
Bipolar Negative Full-Scale Error
This is the offset error of the LTC1650 in bipolar mode.
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