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參數(shù)資料
| 型號： | LTC1658IS8#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 9/12頁 |
| 文件大小： | 0K |
| 描述： | IC D/A CONV 14BIT R-R 8-SOIC |
| 標(biāo)準(zhǔn)包裝： | 100 |
| 設(shè)置時(shí)間： | 12µs |
| 位數(shù)： | 14 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 3mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 1 電壓，單極 |
| 采樣率（每秒）： | * |
6
LTC1658
TI I G DIAGRA
WU
W
B12
B13
MSB
t1
t6
t9
BX
DUMMY
BX
DUMMY
B0
LSB
B11
t7
t2
t4
t3
t8
CLK
DIN
DOUT
CS/LD
t5
1658 TD
B13
PREVIOUS WORD
B13
CURRENT WORD
B11
B12
BX
DEFI ITIO S
UU
Differential Nonlinearity (DNL): The difference between
the measured change and the ideal 1LSB change for any
two adjacent codes. The DNL error between any two codes
is calculated as follows:
DNL = (
VOUT – LSB)/LSB
Where
VOUT is the measured voltage difference between
two adjacent codes.
Digital Feedthrough: The glitch that appears at the analog
output caused by AC coupling from the digital inputs when
they change state. The area of the glitch is specified in
(nV)(sec).
Gain Error: Gain error is the difference between the output
of a DAC from its ideal full-scale value after offset error has
been adjusted.
Integral Nonlinearity (INL): The deviation from a straight
line passing through the endpoints of the DAC transfer
curve (Endpoint INL). Because the output cannot go below
zero, the linearity is measured between full scale and the
lowest code which guarantees the output will be greater
than zero. The INL error at a given input code is calculated
as follows:
INL = [VOUT – VOS – (VFS – VOS)(code/16383)]/LSB
Where VOUT is the output voltage of the DAC measured at
the given input code.
Least Significant Bit (LSB): The ideal voltage difference
between two successive codes.
LSB = VREF/16384
Resolution (n): Defines the number of DAC output states
(2n) that divide the full-scale range. Resolution does not
imply linearity.
Voltage Offset Error (VOS): Nominally, the voltage at the
output when the DAC is loaded with all zeros. A single
supply DAC can have a true negative offset, but the output
cannot go below zero (see Applications Information).
For this reason, single supply DAC offset is measured at
the lowest code that guarantees the output will be greater
than zero.
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