參數(shù)資料
型號(hào): LTC1659CMS8#TRPBF
廠商: Linear Technology
文件頁數(shù): 12/12頁
文件大?。?/td> 0K
描述: IC D/A CONV 12BIT R-R 8-MSOP
標(biāo)準(zhǔn)包裝: 2,500
設(shè)置時(shí)間: 14µs
位數(shù): 12
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 720µW
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-MSOP
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 1 電壓,單極
采樣率(每秒): *
LTC1659
9
1659fa
APPLICATIONS INFORMATION
Rail-to-Rail Output Considerations
In any rail-to-rail DAC, the output swing is limited to volt-
ages within the supply range.
If the DAC offset is negative, the output for the lowest
codes limits at 0V as shown in Figure 1b.
Similarly, limiting can occur near full scale when the REF
pin is tied to VCC. If VREF = VCC and the DAC full-scale
Figure 1. Effects of Rail-to-Rail Operation on a DAC Transfer Curve
(1a) Overall Transfer Function
(1b) Effect of Negative Offset for Codes Near Zero Scale
(1c) Effect of Positive Full-Scale Error for Input Codes Near Full Scale When VREF = VCC
error (FSE) is positive, the output for the highest codes
limits at VCC as shown is Figure 1c. No full-scale limiting
can occur if VREF is less than VCC – FSE.
Offset and linearity are dened and tested over the region
of the DAC transfer function where no output limiting can
occur.
1659 F01
INPUT CODE
(1b)
OUTPUT
VOLTAGE
NEGATIVE
OFFSET
0V
2048
0
4095
INPUT CODE
OUTPUT
VOLTAGE
(1a)
VREF = VCC
(1c)
INPUT CODE
OUTPUT
VOLTAGE
POSITIVE
FSE
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